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Searched refs:uint16_t (Results 1 – 25 of 975) sorted by relevance

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/linux/drivers/gpu/drm/amd/pm/inc/
A Dtonga_ppsmc.h89 #define PPSMC_Result_OK ((uint16_t)0x01)
90 #define PPSMC_Result_NoMore ((uint16_t)0x02)
91 #define PPSMC_Result_NotNow ((uint16_t)0x03)
93 #define PPSMC_Result_Failed ((uint16_t)0xFF)
94 #define PPSMC_Result_UnknownCmd ((uint16_t)0xFE)
95 #define PPSMC_Result_UnknownVT ((uint16_t)0xFD)
97 typedef uint16_t PPSMC_Result;
99 #define PPSMC_isERROR(x) ((uint16_t)0x80 & (x))
102 #define PPSMC_MSG_Halt ((uint16_t)0x10)
188 #define PPSMC_MSG_GPIO17 ((uint16_t)0x98)
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A Dfiji_ppsmc.h87 #define PPSMC_Result_OK ((uint16_t)0x01)
88 #define PPSMC_Result_NoMore ((uint16_t)0x02)
90 #define PPSMC_Result_NotNow ((uint16_t)0x03)
92 #define PPSMC_Result_Failed ((uint16_t)0xFF)
93 #define PPSMC_Result_UnknownCmd ((uint16_t)0xFE)
94 #define PPSMC_Result_UnknownVT ((uint16_t)0xFD)
96 #define PPSMC_isERROR(x) ((uint16_t)0x80 & (x))
99 #define PPSMC_MSG_Halt ((uint16_t)0x10)
100 #define PPSMC_MSG_Resume ((uint16_t)0x11)
101 #define PPSMC_MSG_EnableDPMLevel ((uint16_t)0x12)
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A Dsmu7_ppsmc.h83 #define PPSMC_Result_OK ((uint16_t)0x01)
84 #define PPSMC_Result_NoMore ((uint16_t)0x02)
86 #define PPSMC_Result_NotNow ((uint16_t)0x03)
87 #define PPSMC_Result_Failed ((uint16_t)0xFF)
88 #define PPSMC_Result_UnknownCmd ((uint16_t)0xFE)
89 #define PPSMC_Result_UnknownVT ((uint16_t)0xFD)
91 typedef uint16_t PPSMC_Result;
93 #define PPSMC_isERROR(x) ((uint16_t)0x80 & (x))
96 #define PPSMC_MSG_Halt ((uint16_t)0x10)
97 #define PPSMC_MSG_Resume ((uint16_t)0x11)
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A Dcz_ppsmc.h49 #define PPSMC_Result_OK ((uint16_t)0x01)
50 #define PPSMC_Result_NoMore ((uint16_t)0x02)
51 #define PPSMC_Result_NotNow ((uint16_t)0x03)
52 #define PPSMC_Result_Failed ((uint16_t)0xFF)
53 #define PPSMC_Result_UnknownCmd ((uint16_t)0xFE)
54 #define PPSMC_Result_UnknownVT ((uint16_t)0xFD)
56 #define PPSMC_isERROR(x) ((uint16_t)0x80 & (x))
61 #define PPSMC_MSG_Test ((uint16_t) 0x1)
62 #define PPSMC_MSG_GetFeatureStatus ((uint16_t) 0x2)
63 #define PPSMC_MSG_EnableAllSmuFeatures ((uint16_t) 0x3)
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A Dsmu11_driver_if_navi10.h489 uint16_t DeviceID;
497 uint16_t TGP;
498 uint16_t CardPower;
846 uint16_t FanMode;
885 uint16_t CurrFanSpeed;
918 uint16_t CurrFanSpeed;
957 uint16_t CurrFanSpeed;
963 uint16_t padding16_2;
1023 uint16_t MinUclk;
1024 uint16_t MaxUclk;
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A Dsmu11_driver_if_sienna_cichlid.h581 uint16_t Fmin;
582 uint16_t Fmax;
748 uint16_t FanPwmMin;
993 uint16_t SocLIVmin;
1387 uint16_t CurrFanSpeed;
1405 uint16_t Padding16_2;
1444 uint16_t CurrFanSpeed;
1462 uint16_t Padding16_2;
1480 uint16_t MinUclk;
1481 uint16_t MaxUclk;
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A Dsmu11_driver_if.h378 uint16_t TdcLimitSoc;
380 uint16_t TdcLimitGfx;
383 uint16_t TedgeLimit;
385 uint16_t ThbmLimit;
386 uint16_t Tvr_gfxLimit;
387 uint16_t Tvr_memLimit;
390 uint16_t TplxLimit;
679 uint16_t MinClock;
680 uint16_t MaxClock;
681 uint16_t MinUclk;
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A Dsmu11_driver_if_arcturus.h310 uint16_t SlaveAddress;
464 uint16_t Padding16;
536 uint16_t EnableTdpm;
545 uint16_t FanGainEdge;
550 uint16_t FanGainHbm;
551 uint16_t FanPwmMin;
724 uint16_t GpioPadding;
748 uint16_t padding16;
788 uint16_t avgPsmCount[75];
789 uint16_t minPsmCount[75];
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A Dsmu13_driver_if_aldebaran.h276 uint16_t TdcLimitGfx; // Amps
284 uint16_t PaddingLimit;
347 uint16_t DcBtcEnabled;
359 uint16_t GFX_PPVmin_Enabled;
371 uint16_t SOC_PPVmin_Enabled;
387 uint16_t spare22;
436 uint16_t spare5;
442 uint16_t EdcPowerLimit;
443 uint16_t spare6;
502 uint16_t avgPsmCount[76];
[all …]
A Dsmu11_driver_if_vangogh.h45 uint16_t Freq; // in MHz
52 uint16_t MinMclk;
53 uint16_t MaxMclk;
173 uint16_t spare;
181 uint16_t CurrentSocketPower; //[mW]
185 uint16_t CorePower[8]; //[mW]
192 uint16_t EdgeTemperature;
193 uint16_t ThrottlerStatus;
202 uint16_t spare;
222 uint16_t EdgeTemperature;
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A Dhwmgr.h390 uint16_t Vddc1;
391 uint16_t Vddc2;
392 uint16_t Vddc3;
413 uint16_t usTDP;
415 uint16_t usTDC;
450 uint16_t usTDP;
452 uint16_t usTDC;
527 uint16_t vddc;
528 uint16_t vddci;
529 uint16_t vddgfx;
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A Dsmu12_driver_if.h46 uint16_t Freq; // in MHz
47 uint16_t Vid; // min voltage in SVI2 VID
53 uint16_t MinMclk;
54 uint16_t MaxMclk;
187 uint16_t CurrentSocketPower; //[W]
197 uint16_t ThrottlerStatus;
198 uint16_t spare;
200 uint16_t StapmOriginalLimit; //[W]
201 uint16_t StapmCurrentLimit; //[W]
202 uint16_t ApuPower; //[W]
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A Dsmu13_driver_if_yellow_carp.h45 uint16_t Freq; // in MHz
46 uint16_t Vid; // min voltage in SVI3 VID
52 uint16_t MinMclk;
53 uint16_t MaxMclk;
164 uint16_t spare;
175 uint16_t CorePower[8]; //[mW]
182 uint16_t ThrottlerStatus;
185 uint16_t StapmOpnLimit; //[W]
186 uint16_t StapmCurrentLimit; //[W]
198 uint16_t SkinTemp;
[all …]
A Dsmu74_discrete.h46 uint16_t fcw_pcc;
54 uint16_t Voltage;
69 uint16_t Fcw_int;
70 uint16_t Fcw_frac;
77 uint16_t Fcw1_int;
213 uint16_t padding16;
377 uint16_t FdoMode;
514 uint16_t Alpha;
526 uint16_t Alpha;
607 uint16_t padding;
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/linux/drivers/gpu/drm/amd/include/
A Dkgd_pp_interface.h514 uint16_t padding;
573 uint16_t padding;
635 uint16_t padding;
646 uint16_t voltage_soc;
650 uint16_t padding1;
705 uint16_t fan_pwm;
707 uint16_t padding;
755 uint16_t fan_pwm;
757 uint16_t padding[3];
805 uint16_t fan_pwm;
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A Datomfirmware.h48 #ifndef uint16_t
258 uint16_t reserved;
403 uint16_t gfx_info;
436 uint16_t pixclk;
437 uint16_t h_active;
439 uint16_t v_active;
445 uint16_t reserved;
449 uint16_t miscinfo;
1111 uint16_t caps;
2528 uint16_t spare5;
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/linux/drivers/gpu/drm/amd/pm/inc/vega12/
A Dsmu9_driver_if.h265 uint16_t TdcLimitSoc;
267 uint16_t TdcLimitGfx;
270 uint16_t TedgeLimit;
272 uint16_t ThbmLimit;
273 uint16_t Tvr_gfxLimit;
274 uint16_t Tvr_memLimit;
277 uint16_t TplxLimit;
572 uint16_t MinClock;
573 uint16_t MaxClock;
574 uint16_t MinUclk;
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/linux/drivers/gpu/drm/amd/pm/powerplay/
A Dppsmc.h113 #define PPSMC_MSG_EnableACDCGPIOInterrupt ((uint16_t) 0x149)
116 #define PPSMC_MSG_UVDDPM_SetEnabledMask ((uint16_t) 0x12D)
117 #define PPSMC_MSG_VCEDPM_SetEnabledMask ((uint16_t) 0x12E)
118 #define PPSMC_MSG_ACPDPM_SetEnabledMask ((uint16_t) 0x12F)
119 #define PPSMC_MSG_SAMUDPM_SetEnabledMask ((uint16_t) 0x130)
120 #define PPSMC_MSG_MCLKDPM_ForceState ((uint16_t) 0x131)
121 #define PPSMC_MSG_MCLKDPM_NoForcedLevel ((uint16_t) 0x132)
122 #define PPSMC_MSG_Thermal_Cntl_Disable ((uint16_t) 0x133)
123 #define PPSMC_MSG_Voltage_Cntl_Disable ((uint16_t) 0x135)
124 #define PPSMC_MSG_PCIeDPM_Enable ((uint16_t) 0x136)
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/linux/drivers/gpu/drm/radeon/
A Dppsmc.h113 #define PPSMC_MSG_UVDDPM_SetEnabledMask ((uint16_t) 0x12D)
114 #define PPSMC_MSG_VCEDPM_SetEnabledMask ((uint16_t) 0x12E)
115 #define PPSMC_MSG_ACPDPM_SetEnabledMask ((uint16_t) 0x12F)
116 #define PPSMC_MSG_SAMUDPM_SetEnabledMask ((uint16_t) 0x130)
117 #define PPSMC_MSG_MCLKDPM_ForceState ((uint16_t) 0x131)
118 #define PPSMC_MSG_MCLKDPM_NoForcedLevel ((uint16_t) 0x132)
119 #define PPSMC_MSG_Thermal_Cntl_Disable ((uint16_t) 0x133)
120 #define PPSMC_MSG_Voltage_Cntl_Disable ((uint16_t) 0x135)
121 #define PPSMC_MSG_PCIeDPM_Enable ((uint16_t) 0x136)
122 #define PPSMC_MSG_PCIeDPM_Disable ((uint16_t) 0x13d)
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/linux/drivers/gpu/drm/amd/display/dc/dce/
A Ddce_scl_filters.c36 static const uint16_t filter_2tap_16p[18] = {
78 static const uint16_t filter_3tap_16p_116[27] = {
99 static const uint16_t filter_3tap_16p_149[27] = {
120 static const uint16_t filter_3tap_16p_183[27] = {
162 static const uint16_t filter_4tap_16p_116[36] = {
183 static const uint16_t filter_4tap_16p_149[36] = {
204 static const uint16_t filter_4tap_16p_183[36] = {
225 static const uint16_t filter_2tap_64p[66] = {
315 static const uint16_t filter_3tap_64p_116[99] = {
1437 const uint16_t *get_filter_2tap_16p(void) in get_filter_2tap_16p()
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/linux/drivers/scsi/qla4xxx/
A Dql4_fw.h296 uint16_t version;
297 uint16_t len;
298 uint16_t checksum;
301 uint16_t man_id;
302 uint16_t id;
328 uint16_t start_lo;
336 uint16_t version;
337 uint16_t length;
339 uint16_t unused;
813 uint16_t link;
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/linux/include/linux/
A Dpe.h163 uint16_t magic; /* MZ_MAGIC */
186 uint16_t offset;
187 uint16_t segment;
198 uint16_t flags; /* flags */
205 uint16_t magic; /* file type */
229 uint16_t subsys; /* subsystem */
240 uint16_t magic; /* file type */
263 uint16_t subsys; /* subsystem */
446 uint16_t data;
462 uint16_t revision;
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/linux/drivers/scsi/qla2xxx/
A Dqla_gbl.h67 uint16_t *);
246 uint16_t *);
294 uint16_t *);
304 extern uint16_t qla2x00_calc_iocbs_32(uint16_t);
305 extern uint16_t qla2x00_calc_iocbs_64(uint16_t);
377 uint8_t *, uint16_t *, uint16_t *);
466 qla2x00_set_serdes_params(scsi_qla_host_t *, uint16_t, uint16_t, uint16_t);
498 uint16_t, uint16_t, uint16_t, uint16_t);
502 uint16_t, uint16_t, uint16_t, uint16_t);
505 qla2x00_set_idma_speed(scsi_qla_host_t *, uint16_t, uint16_t, uint16_t *);
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/linux/drivers/gpu/drm/amd/display/dc/dcn20/
A Ddcn20_dwb_scl.c62 static const uint16_t filter_3tap_16p_117[27] = {
74 static const uint16_t filter_3tap_16p_150[27] = {
86 static const uint16_t filter_3tap_16p_183[27] = {
110 static const uint16_t filter_4tap_16p_117[36] = {
122 static const uint16_t filter_4tap_16p_150[36] = {
686 const uint16_t *filter) in wbscl_set_scaler_filter()
691 uint16_t odd_coef, even_coef; in wbscl_set_scaler_filter()
733 const uint16_t *filter_h = NULL; in dwb_program_horz_scalar()
734 const uint16_t *filter_h_c = NULL; in dwb_program_horz_scalar()
813 const uint16_t *filter_v = NULL; in dwb_program_vert_scalar()
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/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/
A Ddcn31_smu.h47 uint16_t Freq; // in MHz
48 uint16_t Vid; // min voltage in SVI3 VID
54 uint16_t MinMclk;
55 uint16_t MaxMclk;
173 uint16_t spare;
184 uint16_t CorePower[8]; //[mW]
191 uint16_t ThrottlerStatus;
194 uint16_t StapmOriginalLimit; //[W]
195 uint16_t StapmCurrentLimit; //[W]
196 uint16_t ApuPower; //[W]
[all …]

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