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Searched refs:ver_total (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/video/fbdev/via/
A Dvia_modesetting.c28 raw.ver_total = timing->ver_total - 2; in via_set_primary_timing()
45 via_write_reg(VIACR, 0x06, raw.ver_total & 0xFF); in via_set_primary_timing()
46 via_write_reg_mask(VIACR, 0x07, (raw.ver_total >> 8 & 0x01) in via_set_primary_timing()
50 | (raw.ver_total >> (9 - 5) & 0x20) in via_set_primary_timing()
62 via_write_reg_mask(VIACR, 0x35, (raw.ver_total >> 10 & 0x01) in via_set_primary_timing()
86 raw.ver_total = timing->ver_total - 1; in via_set_secondary_timing()
104 via_write_reg(VIACR, 0x58, raw.ver_total & 0xFF); in via_set_secondary_timing()
112 via_write_reg(VIACR, 0x5D, (raw.ver_total >> 8 & 0x07) in via_set_secondary_timing()
A Dvia_modesetting.h28 u16 ver_total; member
A Dhw.c1470 timing.ver_total = timing.ver_sync_end + var->upper_margin + dy; in var_to_timing()
1472 timing.ver_blank_end = timing.ver_total - dy; in var_to_timing()
/linux/drivers/gpu/drm/radeon/
A Dradeon_legacy_tv.c76 uint16_t ver_total; member
440 v_total = const_ptr->ver_total; in radeon_legacy_tv_init_restarts()
609 vert_space = const_ptr->ver_total * 2 * 10000 / NTSC_TV_LINES_PER_FRAME; in radeon_legacy_tv_mode_set()
611 vert_space = const_ptr->ver_total * 2 * 10000 / PAL_TV_LINES_PER_FRAME; in radeon_legacy_tv_mode_set()
627 tmp = const_ptr->ver_total * 2 * 1000; in radeon_legacy_tv_mode_set()
780 WREG32(RADEON_TV_VTOTAL, const_ptr->ver_total - 1); in radeon_legacy_tv_mode_set()
846 ((const_ptr->ver_total - 1) << RADEON_CRTC_V_TOTAL_SHIFT); in radeon_legacy_tv_adjust_crtc_reg()

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