| /linux/drivers/gpu/drm/amd/display/dc/dcn10/ |
| A D | dcn10_optc.c | 64 int vupdate_offset, in optc1_program_global_sync() argument
71 optc1->vupdate_offset = vupdate_offset; in optc1_program_global_sync()
83 VUPDATE_OFFSET, optc1->vupdate_offset, in optc1_program_global_sync()
160 int vupdate_offset, in optc1_program_timing() argument
180 optc1->vupdate_offset = vupdate_offset; in optc1_program_timing()
288 vupdate_offset, in optc1_program_timing()
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| A D | dcn10_optc.h | 553 int vupdate_offset; member
600 int vupdate_offset,
620 int vupdate_offset,
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| A D | dcn10_hubp.c | 132 + pipe_dest->vupdate_offset) / pipe_dest->htotal) <= pipe_dest->vblank_end) { in hubp1_vready_workaround()
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| A D | dcn10_hw_sequencer.c | 908 pipe_ctx->pipe_dlg_param.vupdate_offset, in dcn10_enable_stream_timing()
2843 pipe_ctx->pipe_dlg_param.vupdate_offset, in dcn10_program_pipe()
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| /linux/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| A D | timing_generator.h | 161 int vupdate_offset,
245 int vupdate_offset,
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| A D | display_rq_dlg_calc_20.c | 864 unsigned int vupdate_offset; in dml20_rq_dlg_get_dlg_params() local
1012 vupdate_offset = dst->vupdate_offset; in dml20_rq_dlg_get_dlg_params()
1039 - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal in dml20_rq_dlg_get_dlg_params()
1046 - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal in dml20_rq_dlg_get_dlg_params()
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| A D | display_rq_dlg_calc_20v2.c | 864 unsigned int vupdate_offset; in dml20v2_rq_dlg_get_dlg_params() local
1013 vupdate_offset = dst->vupdate_offset; in dml20v2_rq_dlg_get_dlg_params()
1040 - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal in dml20v2_rq_dlg_get_dlg_params()
1047 - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal in dml20v2_rq_dlg_get_dlg_params()
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| /linux/drivers/gpu/drm/amd/display/dc/dce110/ |
| A D | dce110_timing_generator.h | 262 int vupdate_offset,
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| A D | dce110_timing_generator_v.c | 439 int vupdate_offset, in dce110_timing_generator_v_program_timing() argument
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| A D | dce110_timing_generator.c | 1956 int vupdate_offset, in dce110_tg_program_timing() argument
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| /linux/drivers/gpu/drm/amd/display/dc/dce80/ |
| A D | dce80_timing_generator.c | 112 int vupdate_offset, in program_timing() argument
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn21/ |
| A D | display_rq_dlg_calc_21.c | 910 unsigned int vupdate_offset; in dml_rq_dlg_get_dlg_params() local
1052 vupdate_offset = dst->vupdate_offset; in dml_rq_dlg_get_dlg_params()
1079 - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal in dml_rq_dlg_get_dlg_params()
1086 - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal in dml_rq_dlg_get_dlg_params()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/ |
| A D | dml1_display_rq_dlg_calc.c | 1061 unsigned int vupdate_offset; in dml1_rq_dlg_get_dlg_params() local
1243 vupdate_offset = e2e_pipe_param->pipe.dest.vupdate_offset; in dml1_rq_dlg_get_dlg_params()
1314 line_setup = (double) (vupdate_offset + vupdate_width + vready_offset) / (double) htotal; in dml1_rq_dlg_get_dlg_params()
1339 DTRACE("DLG: %s: vupdate_offset = %d", __func__, vupdate_offset); in dml1_rq_dlg_get_dlg_params()
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| A D | display_mode_structs.h | 352 unsigned int vupdate_offset; member
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| A D | display_mode_lib.c | 210 dml_print("DML PARAMS: vupdate_offset = %d\n", pipe_dest->vupdate_offset); in dml_log_pipe_params()
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| A D | display_mode_vba.h | 106 dml_get_pipe_attr_decl(vupdate_offset);
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| A D | display_mode_vba.c | 161 dml_get_pipe_attr_func(vupdate_offset, mode_lib->vba.VUpdateOffsetPix);
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| /linux/drivers/gpu/drm/amd/display/dc/dce60/ |
| A D | dce60_timing_generator.c | 112 int vupdate_offset, in program_timing() argument
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| A D | display_rq_dlg_calc_30.c | 1064 unsigned int vupdate_offset = 0; in dml_rq_dlg_get_dlg_params() local
1201 vupdate_offset = dst->vupdate_offset; in dml_rq_dlg_get_dlg_params()
1228 - (double)(vready_offset + vupdate_width + vupdate_offset) / htotal in dml_rq_dlg_get_dlg_params()
1235 - (double)(vready_offset + vupdate_width + vupdate_offset) / htotal in dml_rq_dlg_get_dlg_params()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| A D | display_rq_dlg_calc_31.c | 1002 unsigned int vupdate_offset; in dml_rq_dlg_get_dlg_params() local
1122 vupdate_offset = dst->vupdate_offset; in dml_rq_dlg_get_dlg_params()
1143 …if (vstartup_start / 2.0 - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal <= v… in dml_rq_dlg_get_dlg_params()
1148 …if (vstartup_start - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal <= vblank_… in dml_rq_dlg_get_dlg_params()
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| /linux/drivers/gpu/drm/amd/display/dc/calcs/ |
| A D | dcn_calcs.c | 446 input->dest.vupdate_offset = pipe->pipe_dlg_param.vupdate_offset; in pipe_ctx_to_e2e_pipe_params()
447 input->dest.vupdate_offset = pipe->pipe_dlg_param.vupdate_offset; in pipe_ctx_to_e2e_pipe_params()
1229 pipe->pipe_dlg_param.vupdate_offset = v->v_update_offset_pix[input_idx]; in dcn_validate_bandwidth()
1270 hsplit_pipe->pipe_dlg_param.vupdate_offset = v->v_update_offset_pix[input_idx]; in dcn_validate_bandwidth()
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| /linux/drivers/gpu/drm/amd/display/dc/dcn20/ |
| A D | dcn20_hwseq.c | 700 pipe_ctx->pipe_dlg_param.vupdate_offset, in dcn20_enable_stream_timing()
1306 || old_pipe->pipe_dlg_param.vupdate_offset != new_pipe->pipe_dlg_param.vupdate_offset in dcn20_detect_pipe_changes()
1589 pipe_ctx->pipe_dlg_param.vupdate_offset, in dcn20_program_pipe()
1882 pipe_ctx->pipe_dlg_param.vupdate_offset, in dcn20_update_bandwidth()
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| A D | dcn20_hubp.c | 186 + pipe_dest->vupdate_offset) / pipe_dest->htotal) <= pipe_dest->vblank_end) { in hubp2_vready_at_or_After_vsync()
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| A D | dcn20_resource.c | 3142 …pipes[pipe_idx].pipe.dest.vupdate_offset = get_vupdate_offset(&context->bw_ctx.dml, pipes, pipe_cn… in dcn20_calculate_dlg_params()
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| /linux/drivers/gpu/drm/amd/display/dc/dce120/ |
| A D | dce120_timing_generator.c | 698 int vupdate_offset, in dce120_tg_program_timing() argument
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