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Searched refs:DCFG_BASE (Results 1 – 2 of 2) sorted by relevance

/optee_os/core/arch/arm/plat-ls/
A Dmain.c80 io_write32(DCFG_BASE + DCFG_SCRATCHRW1, in plat_primary_init_early()
84 io_write32(DCFG_BASE + DCFG_CCSR_BRR /* cpu1 */, in plat_primary_init_early()
A Dplatform_config.h44 #define DCFG_BASE 0x01EE0000 macro

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