Home
last modified time | relevance | path

Searched refs:GICC_OFFSET (Results 1 – 25 of 32) sorted by relevance

12

/optee_os/core/arch/arm/plat-ls/
A Dplatform_config.h60 #define GICC_OFFSET 0x2000 macro
69 #define GICC_OFFSET 0x2000 macro
78 #define GICC_OFFSET 0x20000 macro
87 #define GICC_OFFSET 0x0 macro
96 #define GICC_OFFSET 0x0 macro
105 #define GICC_OFFSET 0x0 macro
114 #define GICC_OFFSET 0x0 macro
123 #define GICC_OFFSET 0x0 macro
/optee_os/core/arch/arm/plat-vexpress/
A Dplatform_config.h97 #define GICC_OFFSET 0x0 macro
111 #define GICC_OFFSET 0x1f000 macro
123 #define GICC_OFFSET 0x10000 macro
128 #define GICC_OFFSET 0x10000 macro
136 #define GICC_BASE (GIC_BASE + GICC_OFFSET)
/optee_os/core/arch/arm/plat-mediatek/
A Dplatform_config.h23 #define GICC_OFFSET 0x2000 macro
41 #define GICC_OFFSET 0x400000 macro
55 #define GICC_OFFSET 0x10000 macro
69 #define GICC_OFFSET 0x400000 macro
A Dmain.c27 register_phys_mem_pgdir(MEM_AREA_IO_SEC, GIC_BASE + GICC_OFFSET,
35 gicc_base = (vaddr_t)phys_to_virt(GIC_BASE + GICC_OFFSET, in main_init_gic()
/optee_os/core/arch/arm/plat-marvell/
A Dplatform_config.h69 #define GICC_OFFSET 0x10000 macro
73 #define GICC_BASE (GIC_BASE + GICC_OFFSET)
99 #define GICC_OFFSET (0x80000) macro
104 #define GICC_BASE (GIC_BASE + GICC_OFFSET)
A Dmain.c82 gicc_base = (vaddr_t)phys_to_virt(GIC_BASE + GICC_OFFSET, in main_init_gic()
/optee_os/core/arch/arm/plat-k3/
A Dplatform_config.h20 #define GICC_OFFSET 0x100000 macro
25 #define GICC_OFFSET 0x80000 macro
30 #define GICC_BASE (SCU_BASE + GICC_OFFSET)
/optee_os/core/arch/arm/plat-ti/
A Dplatform_config.h40 #define GICC_OFFSET 0x2000 macro
44 #define GICC_BASE (SCU_BASE + GICC_OFFSET)
73 #define GICC_OFFSET 0x0100 macro
78 #define GICC_BASE (SCU_BASE + GICC_OFFSET)
/optee_os/core/arch/arm/plat-imx/registers/
A Dimx6.h88 #define GICC_OFFSET 0x2000 macro
94 #define GICC_OFFSET 0x100 macro
98 #define GIC_CPU_BASE (GIC_BASE + GICC_OFFSET)
A Dimx7ulp.h13 #define GICC_OFFSET 0x2000 macro
A Dimx7.h12 #define GICC_OFFSET 0x2000 macro
/optee_os/core/arch/arm/plat-rzn1/
A Dplatform_config.h19 #define GICC_OFFSET 0x2000 macro
21 #define GICC_BASE (GIC_BASE + GICC_OFFSET)
/optee_os/core/arch/arm/plat-totalcompute/
A Dplatform_config.h18 #define GICC_OFFSET 0x0 macro
41 #define GICC_BASE (GIC_BASE + GICC_OFFSET)
A Dmain.c37 gicc_base = (vaddr_t)phys_to_virt(GIC_BASE + GICC_OFFSET, in main_init_gic()
/optee_os/core/arch/arm/plat-zynqmp/
A Dplatform_config.h68 #define GICC_OFFSET 0x20000 macro
86 #define GICC_OFFSET 0x20000 macro
A Dmain.c84 gicc_base = (vaddr_t)phys_to_virt(GIC_BASE + GICC_OFFSET, in main_init_gic()
/optee_os/core/arch/arm/plat-zynq7k/
A Dplatform_config.h39 #define GICC_OFFSET 0x100 macro
41 #define GIC_CPU_BASE (GIC_BASE + GICC_OFFSET)
/optee_os/core/arch/arm/plat-aspeed/
A Dplatform_ast2600.c55 GIC_BASE + GICC_OFFSET,
77 gicc_base = core_mmu_get_va(GIC_BASE + GICC_OFFSET, in main_init_gic()
A Dplatform_config.h16 #define GICC_OFFSET 0x2000 macro
/optee_os/core/arch/arm/plat-amlogic/
A Dplatform_config.h15 #define GICC_OFFSET 0x2000 macro
/optee_os/core/arch/arm/plat-sunxi/
A Dplatform_config.h47 #define GICC_OFFSET 0x2000 macro
/optee_os/core/arch/arm/plat-uniphier/
A Dplatform_config.h18 #define GICC_OFFSET 0x80000 macro
A Dmain.c44 gicc_base = (vaddr_t)phys_to_virt(GIC_BASE + GICC_OFFSET, in main_init_gic()
/optee_os/core/arch/arm/plat-sprd/
A Dplatform_config.h60 #define GICC_OFFSET 0x2000 macro
A Dmain.c56 gicc_base = (vaddr_t)phys_to_virt(GIC_BASE + GICC_OFFSET, in main_init_gic()

Completed in 14 milliseconds

12