| /optee_os/core/arch/arm/plat-ls/ |
| A D | platform_config.h | 61 #define GICD_OFFSET 0x1000 macro
70 #define GICD_OFFSET 0x1000 macro
79 #define GICD_OFFSET 0x10000 macro
88 #define GICD_OFFSET 0x0 macro
97 #define GICD_OFFSET 0x0 macro
106 #define GICD_OFFSET 0x0 macro
115 #define GICD_OFFSET 0x0 macro
124 #define GICD_OFFSET 0x0 macro
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| /optee_os/core/arch/arm/plat-marvell/ |
| A D | platform_config.h | 70 #define GICD_OFFSET 0x0 macro
72 #define GICD_BASE (GIC_BASE + GICD_OFFSET)
101 #define GICD_OFFSET (0x0) macro
103 #define GICD_BASE (GIC_BASE + GICD_OFFSET)
120 #define GICD_OFFSET (0x0) macro
122 #define GICD_BASE (GIC_BASE + GICD_OFFSET)
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| /optee_os/core/arch/arm/plat-vexpress/ |
| A D | platform_config.h | 98 #define GICD_OFFSET 0x3000000 macro
112 #define GICD_OFFSET 0 macro
122 #define GICD_OFFSET 0 macro
127 #define GICD_OFFSET 0 macro
135 #define GICD_BASE (GIC_BASE + GICD_OFFSET)
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| /optee_os/core/arch/arm/plat-mediatek/ |
| A D | platform_config.h | 24 #define GICD_OFFSET 0x1000 macro
42 #define GICD_OFFSET 0x0 macro
56 #define GICD_OFFSET 0x00000 macro
70 #define GICD_OFFSET 0x0 macro
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| A D | main.c | 25 register_phys_mem_pgdir(MEM_AREA_IO_SEC, GIC_BASE + GICD_OFFSET,
37 gicd_base = (vaddr_t)phys_to_virt(GIC_BASE + GICD_OFFSET, in main_init_gic()
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| /optee_os/core/arch/arm/plat-k3/ |
| A D | platform_config.h | 22 #define GICD_OFFSET 0x0 macro
27 #define GICD_OFFSET 0x0 macro
31 #define GICD_BASE (SCU_BASE + GICD_OFFSET)
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| /optee_os/core/arch/arm/plat-ti/ |
| A D | platform_config.h | 42 #define GICD_OFFSET 0x1000 macro
45 #define GICD_BASE (SCU_BASE + GICD_OFFSET)
71 #define GICD_OFFSET 0x1000 macro
77 #define GICD_BASE (SCU_BASE + GICD_OFFSET)
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| /optee_os/core/arch/arm/plat-rzn1/ |
| A D | platform_config.h | 18 #define GICD_OFFSET 0x1000 macro
20 #define GICD_BASE (GIC_BASE + GICD_OFFSET)
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| /optee_os/core/arch/arm/plat-totalcompute/ |
| A D | platform_config.h | 17 #define GICD_OFFSET 0x0 macro
40 #define GICD_BASE (GIC_BASE + GICD_OFFSET)
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| /optee_os/core/arch/arm/plat-sprd/ |
| A D | main.c | 46 ROUNDDOWN(GIC_BASE + GICD_OFFSET, CORE_MMU_PGDIR_SIZE),
58 gicd_base = (vaddr_t)phys_to_virt(GIC_BASE + GICD_OFFSET, in main_init_gic()
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| A D | platform_config.h | 61 #define GICD_OFFSET 0x1000 macro
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| /optee_os/core/arch/arm/plat-zynqmp/ |
| A D | platform_config.h | 67 #define GICD_OFFSET 0 macro
85 #define GICD_OFFSET 0 macro
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| A D | main.c | 62 ROUNDDOWN(GIC_BASE + GICD_OFFSET, CORE_MMU_PGDIR_SIZE),
86 gicd_base = (vaddr_t)phys_to_virt(GIC_BASE + GICD_OFFSET, in main_init_gic()
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| /optee_os/core/arch/arm/plat-uniphier/ |
| A D | main.c | 26 ROUNDDOWN(GIC_BASE + GICD_OFFSET, CORE_MMU_PGDIR_SIZE),
46 gicd_base = (vaddr_t)phys_to_virt(GIC_BASE + GICD_OFFSET, in main_init_gic()
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| A D | platform_config.h | 17 #define GICD_OFFSET 0 macro
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| /optee_os/core/arch/arm/plat-zynq7k/ |
| A D | platform_config.h | 40 #define GICD_OFFSET 0x1000 macro
42 #define GIC_DIST_BASE (GIC_BASE + GICD_OFFSET)
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| /optee_os/core/arch/arm/plat-imx/registers/ |
| A D | imx6.h | 85 #define GICD_OFFSET 0x1000 macro
99 #define GIC_DIST_BASE (GIC_BASE + GICD_OFFSET)
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| A D | imx7ulp.h | 14 #define GICD_OFFSET 0x1000 macro
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| A D | imx7.h | 13 #define GICD_OFFSET 0x1000 macro
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| /optee_os/core/arch/arm/plat-aspeed/ |
| A D | platform_ast2600.c | 51 GIC_BASE + GICD_OFFSET,
79 gicd_base = core_mmu_get_va(GIC_BASE + GICD_OFFSET, in main_init_gic()
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| A D | platform_config.h | 17 #define GICD_OFFSET 0x1000 macro
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| /optee_os/core/arch/arm/plat-amlogic/ |
| A D | platform_config.h | 16 #define GICD_OFFSET 0x1000 macro
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| /optee_os/core/arch/arm/plat-synquacer/ |
| A D | platform_config.h | 14 #define GICD_OFFSET 0x0 macro
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| A D | main.c | 47 gicd_base = (vaddr_t)phys_to_virt(GIC_BASE + GICD_OFFSET, in main_init_gic()
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| /optee_os/core/arch/arm/plat-sunxi/ |
| A D | platform_config.h | 48 #define GICD_OFFSET 0x1000 macro
|