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Searched refs:TZSRAM_BASE (Results 1 – 7 of 7) sorted by relevance

/optee_os/core/arch/arm/include/mm/
A Dgeneric_ram_layout.h137 #define TZSRAM_BASE CFG_TZSRAM_START macro
146 #define TZSRAM_BASE CFG_TZDRAM_START macro
148 #define TZDRAM_BASE ROUNDUP(TZSRAM_BASE + TZSRAM_SIZE, \
155 #define TEE_RAM_START TZSRAM_BASE
/optee_os/core/arch/arm/plat-stm/
A Dplatform_config.h187 #if defined(CFG_WITH_PAGER) && defined(TZSRAM_BASE)
188 #if TZSRAM_BASE >= CFG_DDR_START
189 #define STM_SECDDR_BASE MIN_UNSAFE(TZSRAM_BASE, TZDRAM_BASE)
190 #define STM_SECDDR_END MAX_UNSAFE(TZSRAM_BASE + TZSRAM_SIZE, \
/optee_os/core/arch/arm/plat-poplar/
A Dplatform_config.h116 #define TZSRAM_BASE 0x03000000 macro
122 #define TEE_RAM_START TZSRAM_BASE
/optee_os/core/arch/arm/plat-zynq7k/
A Dplatform_config.h189 #define TZSRAM_BASE 0x3E000000 macro
194 #define TEE_RAM_START TZSRAM_BASE
/optee_os/core/arch/arm/plat-ti/
A Dplatform_config.h19 #define TZSRAM_BASE 0x40300000 macro
109 #define TEE_RAM_START TZSRAM_BASE
/optee_os/core/arch/arm/kernel/
A Dboot.c401 size_t tzsram_end = TZSRAM_BASE + TZSRAM_SIZE; in init_runtime()
/optee_os/core/arch/arm/mm/
A Dcore_mmu.c69 #ifdef TZSRAM_BASE
70 MEMACCESS_AREA(TZSRAM_BASE, TZSRAM_SIZE),

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