| /optee_os/core/arch/arm/plat-imx/ |
| A D | crypto_conf.mk | 86 define cryphw-enable-drv-hw
98 $(eval $(call cryphw-enable-drv-hw, HASH))
99 $(eval $(call cryphw-enable-drv-hw, CIPHER))
100 $(eval $(call cryphw-enable-drv-hw, HMAC))
101 $(eval $(call cryphw-enable-drv-hw, CMAC))
105 $(eval $(call cryphw-enable-drv-hw, RSA))
106 $(eval $(call cryphw-enable-drv-hw, ECC))
107 $(eval $(call cryphw-enable-drv-hw, DH))
108 $(eval $(call cryphw-enable-drv-hw, DSA))
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| /optee_os/core/arch/arm/plat-ls/ |
| A D | crypto_conf.mk | 111 define cryphw-enable-drv-hw
123 $(eval $(call cryphw-enable-drv-hw, HASH))
124 $(eval $(call cryphw-enable-drv-hw, CIPHER))
127 $(eval $(call cryphw-enable-drv-hw, RSA))
128 $(eval $(call cryphw-enable-drv-hw, ECC))
129 $(eval $(call cryphw-enable-drv-hw, DH))
130 $(eval $(call cryphw-enable-drv-hw, DSA))
|
| /optee_os/core/drivers/crypto/caam/hal/imx_6_7/ |
| A D | hal_clk_mx6.c | 12 void caam_hal_clk_enable(bool enable) in caam_hal_clk_enable() argument
24 if (enable) in caam_hal_clk_enable()
36 if (enable) in caam_hal_clk_enable()
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| A D | hal_clk_mx7ulp.c | 12 void caam_hal_clk_enable(bool enable) in caam_hal_clk_enable() argument
17 if (enable) in caam_hal_clk_enable()
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| A D | hal_clk_mx7.c | 12 void caam_hal_clk_enable(bool enable) in caam_hal_clk_enable() argument
16 if (enable) { in caam_hal_clk_enable()
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| /optee_os/core/drivers/crypto/caam/hal/imx_8ulp/ |
| A D | hal_clk.c | 12 void caam_hal_clk_enable(bool enable) in caam_hal_clk_enable() argument
17 if (enable) in caam_hal_clk_enable()
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| /optee_os/core/arch/arm/plat-imx/pm/ |
| A D | gpcv2.c | 19 void imx_gpcv2_set_core_pgc(bool enable, uint32_t offset) in imx_gpcv2_set_core_pgc() argument
23 if (enable) in imx_gpcv2_set_core_pgc()
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| /optee_os/core/ |
| A D | crypto.mk | 66 $(eval $(call cryp-enable-all-depends,CFG_WITH_SOFTWARE_PRNG, AES ECB SHA256))
107 cryp-enable-all-depends = $(call cfg-enable-all-depends,$(strip $(1)),$(foreach v,$(2),CFG_CRYPTO_$…
108 $(eval $(call cryp-enable-all-depends,CFG_REE_FS, AES ECB CTR HMAC SHA256 GCM))
109 $(eval $(call cryp-enable-all-depends,CFG_RPMB_FS, AES ECB CTR HMAC SHA256 GCM))
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| /optee_os/core/arch/arm/plat-stm32mp1/drivers/ |
| A D | stm32mp1_pwr.c | 58 void stm32mp1_pwr_regulator_set_state(enum pwr_regulator id, bool enable) in stm32mp1_pwr_regulator_set_state() argument
65 if (enable) { in stm32mp1_pwr_regulator_set_state()
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| A D | stm32mp1_pwr.h | 31 void stm32mp1_pwr_regulator_set_state(enum pwr_regulator id, bool enable);
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| /optee_os/core/drivers/ |
| A D | stpmic1.c | 875 int stpmic1_lp_reg_on_off(const char *name, uint8_t enable) in stpmic1_lp_reg_on_off() argument
882 return stpmic1_register_update(regul->low_power_reg, enable, in stpmic1_lp_reg_on_off()
886 int stpmic1_lp_on_off_unpg(struct stpmic1_lp_cfg *cfg, int enable) in stpmic1_lp_on_off_unpg() argument
888 assert(cfg->lp_reg && (enable == 0 || enable == 1)); in stpmic1_lp_on_off_unpg()
890 return stpmic1_register_update(cfg->lp_reg, enable, in stpmic1_lp_on_off_unpg()
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| A D | sp805_wdt.c | 46 static void sp805_config(struct wdt_chip *chip, bool enable) in sp805_config() argument
56 if (enable) in sp805_config()
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| A D | stm32_rng.c | 127 static void gate_rng(bool enable, struct stm32_rng_instance *dev) in gate_rng() argument
132 if (enable) { in gate_rng()
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| /optee_os/core/drivers/clk/sam/ |
| A D | at91_main.c | 83 .enable = pmc_main_rc_osc_enable,
165 .enable = pmc_main_osc_enable,
281 .enable = clk_sam9x5_main_enable,
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| A D | at91_audio_pll.c | 278 .enable = clk_audio_pll_frac_enable,
285 .enable = clk_audio_pll_pad_enable,
292 .enable = clk_audio_pll_pmc_enable,
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| A D | at91_master.c | 73 .enable = clk_master_enable,
105 .enable = clk_master_enable,
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| /optee_os/core/drivers/crypto/caam/hal/imx_8q/ |
| A D | hal_clk.c | 8 void caam_hal_clk_enable(bool enable __unused) in caam_hal_clk_enable()
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| /optee_os/core/drivers/crypto/caam/hal/imx_8m/ |
| A D | hal_clk.c | 10 void caam_hal_clk_enable(bool enable __unused) in caam_hal_clk_enable()
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| /optee_os/core/drivers/crypto/caam/hal/ls/ |
| A D | hal_clk.c | 10 void caam_hal_clk_enable(bool enable __unused) in caam_hal_clk_enable()
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| /optee_os/core/drivers/crypto/caam/include/ |
| A D | caam_hal_clk.h | 17 void caam_hal_clk_enable(bool enable);
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| /optee_os/core/arch/arm/plat-stm32mp1/ |
| A D | scmi_server.c | 588 static void pwr_set_state(struct stm32_scmi_voltd *voltd, bool enable) in pwr_set_state() argument
592 DMSG("%sable PWR %s (was %s)", enable ? "En" : "Dis", voltd->name, in pwr_set_state()
595 stm32mp1_pwr_regulator_set_state(regu_id, enable); in pwr_set_state()
686 static int32_t pmic_set_state(struct stm32_scmi_voltd *voltd, bool enable) in pmic_set_state() argument
695 DMSG("%sable STPMIC1 %s (was %s)", enable ? "En" : "Dis", voltd->name, in pmic_set_state()
698 if (enable) in pmic_set_state()
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| /optee_os/core/arch/arm/dts/ |
| A D | fsl-lx2160a.dtsi | 30 enable-method = "psci";
47 enable-method = "psci";
64 enable-method = "psci";
81 enable-method = "psci";
98 enable-method = "psci";
115 enable-method = "psci";
132 enable-method = "psci";
149 enable-method = "psci";
166 enable-method = "psci";
183 enable-method = "psci";
[all …]
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| /optee_os/mk/ |
| A D | checkconf.mk | 152 cfg-enable-all-depends = \
161 $(call cfg-enable-all-depends,$(1),$(filter-out $(firstword $(2)),$(2))), \
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| /optee_os/core/include/drivers/ |
| A D | stpmic1.h | 193 int stpmic1_lp_reg_on_off(const char *name, uint8_t enable);
250 int stpmic1_lp_on_off_unpg(struct stpmic1_lp_cfg *cfg, int enable);
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| /optee_os/core/drivers/scmi-msg/ |
| A D | clock.c | 220 bool enable = false; in scmi_clock_config_set() local
236 enable = in_args->attributes & SCMI_CLOCK_CONFIG_SET_ENABLE_MASK; in scmi_clock_config_set()
238 status = plat_scmi_clock_set_state(msg->channel_id, clock_id, enable); in scmi_clock_config_set()
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