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/optee_os/core/lib/libtomcrypt/src/ciphers/
A Dserpent.c87 r4 = r1; \
88 r1 &= r3; \
90 r1 ^= r0; \
95 r2 |= r1; \
98 r4 |= r1; \
99 r1 ^= r3; \
100 r1 ^= r4; \
102 r1 ^= r3; \
108 r4 = r1; \
109 r1 |= r0; \
[all …]
/optee_os/core/arch/arm/kernel/
A Dtz_ssvce_pl310_a32.S75 cmp r1, #0
78 mov r1, #0
83 cmp r1, #0
103 cmp r1, #0
106 mov r1, #0
111 cmp r1, #0
131 cmp r1, #0
134 mov r1, #0
139 cmp r1, #0
178 add r1, r1, #PL310_LINE_SIZE
[all …]
A Dthread_a32.S367 sbc r1, r1, #0
369 bic r1, r1, #BIT(TTBR_ASID_SHIFT - 32)
395 add r1, r1, r0
519 lsl r1, r1, #THREAD_CLF_SAVED_SHIFT
520 orr r1, r1, #THREAD_CLF_TMP
682 lsl r1, r1, #THREAD_CLF_SAVED_SHIFT
683 orr r1, r1, #THREAD_CLF_ABORT
804 sub r1, r1, r0
810 sub r1, r1, r0
821 orr r1, r1, #BIT(TTBR_ASID_SHIFT - 32)
[all …]
A Dentry_a32.S295 ldr r1, [r1, r3]
307 mul r1, r0, r1
328 sub r1, r1, r0
337 sub r1, r1, r0
346 sub r1, r1, r0
387 add r1, r1, r2 /* __data_end + len */
407 add r1, r1, r2
462 lsr r1, r1, #ASAN_BLOCK_SHIFT
463 add r1, r1, r2
618 sub r1, r1, r0
[all …]
A Dspin_lock_a32.S42 ldrex r1, [r0]
43 cmp r1, #SPINLOCK_UNLOCK
45 strexeq r1, r2, [r0]
46 cmpeq r1, #0
55 mov r1, r0
57 ldrex r0, [r1]
60 strex r0, r2, [r1]
74 mov r1, #SPINLOCK_UNLOCK
75 str r1, [r0]
A Dcache_helpers_a32.S35 add r1, r0, r1
41 cmp r0, r1
105 mov r1, #0
114 add r10, r1, r1, LSR #1 // Work out 3x current cache level
120 write_csselr r1 // select current cache level in csselr
133 orr r0, r1, r9, LSL r5 // factor in the way number and cache level into r0
142 add r1, r1, #2 // increment the cache number
143 cmp r3, r1
195 sub r1, r3, #2
252 add r1, r0, r1
[all …]
A Dmisc_a32.S41 ubfx r1, r3, #MPIDR_AFF2_SHIFT, #MPIDR_AFFINITY_BITS
42 add r0, r0, r1, LSL #(CFG_CORE_CLUSTER_SHIFT)
49 ubfx r1, r3, #MPIDR_AFF1_SHIFT, #MPIDR_AFFINITY_BITS
51 add r1, r1, r2, LSL #(CFG_CORE_CLUSTER_SHIFT)
52 add r0, r0, r1, LSL #(CFG_CORE_THREAD_SHIFT)
63 mov r1, r0
64 cmp r1, #CPSR_MODE_USR /* update mode: usr -> sys */
65 moveq r1, #CPSR_MODE_SYS
69 orr r0, r1 /* set expected mode */
A Dthread_optee_smc_a32.S49 mov r1, r0
61 pop {r1-r8}
83 mov r1, r0
93 mov r1, r0
103 mov r1, r0
113 mov r1, r0
123 mov r1, r0
133 mov r1, r0
177 mov r1, r4
202 mov r1, r4 /* CPSR to restore */
[all …]
A Dthread_spmc_a32.S19 mov r1, #FFA_TARGET_INFO_MBZ /* Target info MBZ */
66 mov r1, r4 /* Target info */
92 mov r1, r4 /* CPSR to restore */
99 ldm r8, {r1, r4-r6} /* Load rv[] into r1,r4-r6 */
127 mov r1, #THREAD_CTX_SIZE
129 mla r1, r1, r0, r2
130 ldr r1, [r1, #THREAD_CTX_TSD_RPC_TARGET_INFO]
/optee_os/core/lib/libtomcrypt/src/stream/sosemanuk/
A Dsosemanuk.c84 r4 |= r1; r1 ^= r3; \
115 r3 ^= r1; r1 &= r4; \
122 r2 = r1; r1 |= r3; \
129 r4 = r1; r1 &= r3; \
140 r0 ^= r1; r1 ^= r3; \
157 r0 |= r1; r2 ^= r1; \
166 r4 = r1; r1 |= r2; \
170 r3 ^= r1; r1 |= r4; \
173 r2 ^= r1; r1 &= r0; \
676 ulong32 r1 = st->r1; in _sosemanuk_internal() local
[all …]
/optee_os/lib/libutils/ext/arch/arm/
A Datomic_a32.S10 ldrex r1, [r0]
11 add r1, r1, #1
12 strex r2, r1, [r0]
15 mov r0, r1
21 ldrex r1, [r0]
22 sub r1, r1, #1
23 strex r2, r1, [r0]
26 mov r0, r1
/optee_os/core/arch/arm/plat-hisilicon/
A Dhi3519av100_plat_init.S40 mrrc p15, 1, r0, r1, c15
42 mcrr p15, 1, r0, r1, c15
47 mrs r1, cpsr
69 msr cpsr, r1
79 ldr r1, [r0]
80 orr r1, r1, #BIT(9) /* bit 9 set to 1 */
81 str r1, [r0]
/optee_os/core/arch/arm/plat-ti/
A Da9_plat_init.S81 ldr r1, =stack_tmp_stride
82 ldr r1, [r1]
83 mul r1, r0, r1
86 add sp, r1, r0
106 mov r1, #0
/optee_os/core/arch/arm/sm/
A Dsm_a32.S104 read_scr r1
105 tst r1, #SCR_NS
129 stmne r8, {r1-r4}
178 write_scr r1
224 read_scr r1
226 write_scr r1
333 mrs r1, cpsr
373 msr cpsr, r1
381 read_midr r1
414 mrs r1, cpsr
[all …]
/optee_os/out/arm/export-ta_arm32/host_include/mbedtls/
A Dbn_mul.h937 mbedtls_mpi_uint r0, r1;
943 r0 += c; r1 += (r0 < c); \
944 r0 += *d; r1 += (r0 < *d); \
945 c = r1; *(d++) = r0;
962 ry = s1 * b0; r1 = s1 * b1; \
963 r1 += ( rx >> biH ); \
964 r1 += ( ry >> biH ); \
966 r0 += rx; r1 += (r0 < rx); \
967 r0 += ry; r1 += (r0 < ry); \
968 r0 += c; r1 += (r0 < c); \
[all …]
/optee_os/out/arm/export-ta_arm64/include/mbedtls/
A Dbn_mul.h937 mbedtls_mpi_uint r0, r1;
943 r0 += c; r1 += (r0 < c); \
944 r0 += *d; r1 += (r0 < *d); \
945 c = r1; *(d++) = r0;
962 ry = s1 * b0; r1 = s1 * b1; \
963 r1 += ( rx >> biH ); \
964 r1 += ( ry >> biH ); \
966 r0 += rx; r1 += (r0 < rx); \
967 r0 += ry; r1 += (r0 < ry); \
968 r0 += c; r1 += (r0 < c); \
[all …]
/optee_os/out/arm/export-ta_arm32/include/mbedtls/
A Dbn_mul.h937 mbedtls_mpi_uint r0, r1;
943 r0 += c; r1 += (r0 < c); \
944 r0 += *d; r1 += (r0 < *d); \
945 c = r1; *(d++) = r0;
962 ry = s1 * b0; r1 = s1 * b1; \
963 r1 += ( rx >> biH ); \
964 r1 += ( ry >> biH ); \
966 r0 += rx; r1 += (r0 < rx); \
967 r0 += ry; r1 += (r0 < ry); \
968 r0 += c; r1 += (r0 < c); \
[all …]
/optee_os/out/arm/export-ta_arm64/host_include/mbedtls/
A Dbn_mul.h937 mbedtls_mpi_uint r0, r1;
943 r0 += c; r1 += (r0 < c); \
944 r0 += *d; r1 += (r0 < *d); \
945 c = r1; *(d++) = r0;
962 ry = s1 * b0; r1 = s1 * b1; \
963 r1 += ( rx >> biH ); \
964 r1 += ( ry >> biH ); \
966 r0 += rx; r1 += (r0 < rx); \
967 r0 += ry; r1 += (r0 < ry); \
968 r0 += c; r1 += (r0 < c); \
[all …]
/optee_os/lib/libmbedtls/mbedtls/include/mbedtls/
A Dbn_mul.h937 mbedtls_mpi_uint r0, r1;
943 r0 += c; r1 += (r0 < c); \
944 r0 += *d; r1 += (r0 < *d); \
945 c = r1; *(d++) = r0;
962 ry = s1 * b0; r1 = s1 * b1; \
963 r1 += ( rx >> biH ); \
964 r1 += ( ry >> biH ); \
966 r0 += rx; r1 += (r0 < rx); \
967 r0 += ry; r1 += (r0 < ry); \
968 r0 += c; r1 += (r0 < c); \
[all …]
/optee_os/core/arch/arm/plat-stm/
A Dtz_a9init.S30 mov r1, #0x1
31 str r1, [r0, #PL310_CTRL]
34 ldr r1, [r0, #PL310_AUX_CTRL]
35 tst r1, #(1 << 0) /* test AUX_CTRL[FLZ] */
/optee_os/out/arm/ta/trusted_keys/
A Df04a0fe7-1f5d-4b9b-abf7-619b85b4ce8c.dmp2008 9ca: 1ac9 subs r1, r1, r3
9874 3db2: 1a79 subs r1, r7, r1
9941 3e16: 1a09 subs r1, r1, r0
14712 5fa0: 1949 adds r1, r1, r5
14715 5faa: 1949 adds r1, r1, r5
15126 63ac: f1c1 0102 rsb r1, r1, #2
16248 6a3e: b2c9 uxtb r1, r1
20803 8a52: 4249 negs r1, r1
22642 9688: b2c9 uxtb r1, r1
22735 9716: 4149 adcs r1, r1
[all …]
/optee_os/core/arch/arm/crypto/
A Daes_modes_armv8a_ce_a32.S165 vld1.8 {q2}, [r1]!
174 vld1.8 {q0}, [r1]!
196 vld1.8 {q2}, [r1]!
205 vld1.8 {q0}, [r1]!
249 vld1.8 {q2}, [r1]!
306 vld1.8 {q5}, [r1]!
324 vld1.8 {q3}, [r1]!
409 vld1.8 {q2}, [r1]!
429 vld1.8 {q0}, [r1]!
515 vld1.8 {q0}, [r1]
[all …]
/optee_os/out/arm/ta/avb/
A D023f8f1a-292a-432b-8fc4-de8471358067.dmp1862 8b6: 1ac9 subs r1, r1, r3
9311 3b18: 1949 adds r1, r1, r5
9314 3b22: 1949 adds r1, r1, r5
9328 3b50: 1949 adds r1, r1, r5
9331 3b5a: 1949 adds r1, r1, r5
9725 3f24: f1c1 0102 rsb r1, r1, #2
10847 45b6: b2c9 uxtb r1, r1
15402 65ca: 4249 negs r1, r1
21316 8e54: b2c9 uxtb r1, r1
21409 8ee2: 4149 adcs r1, r1
[all …]
/optee_os/out/arm/ta/pkcs11/
A Dfd02c9da-306c-48c7-a49c-bbd827ae86ee.dmp2345 8b0: 0089 lsls r1, r1, #2
4981 19cc: 6989 ldr r1, [r1, #24]
12370 4dd6: 6809 ldr r1, [r1, #0]
23486 9b7a: 1ac9 subs r1, r1, r3
37020 f7f8: f1c1 0102 rsb r1, r1, #2
38142 fe8a: b2c9 uxtb r1, r1
42697 11e9e: 4249 negs r1, r1
44781 12c2c: b2c9 uxtb r1, r1
44964 12d14: b2c9 uxtb r1, r1
45044 12d92: 4149 adcs r1, r1
[all …]
/optee_os/core/arch/arm/tee/
A Darch_svc_a32.S23 mov r9, r1
41 mov r1, r5
87 mov r1, #0 /* panic = false */
102 mov r1, #1 /* panic = true */

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