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Searched refs:spsr (Results 1 – 9 of 9) sorted by relevance

/optee_os/core/arch/arm/kernel/
A Dabort.c38 uint32_t mode = ai->regs->spsr & CPSR_MODE_MASK; in __print_stack_unwind()
128 uint32_t mode = ai->regs->spsr & CPSR_MODE_MASK; in __print_abort_info()
158 core_pos, ai->regs->spsr); in __print_abort_info()
173 core_pos, (uint32_t)ai->regs->spsr); in __print_abort_info()
337 ai->regs->spsr &= CPSR_FIA; in handle_user_mode_panic()
338 ai->regs->spsr &= ~CPSR_MODE_MASK; in handle_user_mode_panic()
339 ai->regs->spsr |= CPSR_MODE_SVC; in handle_user_mode_panic()
342 ai->regs->spsr |= CPSR_T; in handle_user_mode_panic()
344 ai->regs->spsr &= ~CPSR_T; in handle_user_mode_panic()
391 uint32_t spsr = ai->regs->spsr; in abort_is_user_exception() local
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A Dthread_a32.S141 mrs r1, spsr
192 mrs r1, spsr
442 mrs r0, spsr
481 mrs r12, spsr
486 mrs r12, spsr
529 mrs r1, spsr
587 mrs r0, spsr
610 mrs r0, spsr
644 mrs r1, spsr
718 mrs r3, spsr
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A Dthread.c1412 *spsr = s; in get_spsr()
1430 *spsr = s; in get_spsr()
1438 uint32_t spsr) in set_ctx_regs() argument
1452 regs->cpsr = spsr; in set_ctx_regs()
1461 regs->cpsr = spsr; in set_ctx_regs()
1474 uint32_t spsr = 0; in thread_enter_user_mode() local
1482 if (!get_spsr(is_32bit, entry_func, &spsr)) { in thread_enter_user_mode()
1496 set_ctx_regs(regs, a0, a1, a2, a3, user_sp, entry_func, spsr); in thread_enter_user_mode()
1533 regs->spsr = read_cpsr(); in setup_unwind_user_mode()
1537 regs->spsr = SPSR_64(SPSR_64_MODE_EL1, SPSR_64_MODE_SP_EL0, 0); in setup_unwind_user_mode()
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A Dasm-defines.c59 DEFINE(THREAD_SVC_REG_SPSR, offsetof(struct thread_svc_regs, spsr));
67 DEFINE(THREAD_ABT_REG_SPSR, offsetof(struct thread_abort_regs, spsr));
A Dstmm_sp.c563 spc->regs.cpsr = svc_regs->spsr; in save_sp_ctx()
579 spc->regs.cpsr = svc_regs->spsr; in save_sp_ctx()
/optee_os/core/arch/arm/include/
A Darm32.h226 uint32_t spsr; in read_spsr() local
229 : [spsr] "=r" (spsr) in read_spsr()
231 return spsr; in read_spsr()
/optee_os/core/arch/arm/tee/
A Darch_svc.c209 if (((regs->spsr >> SPSR_MODE_RW_SHIFT) & SPSR_MODE_RW_MASK) == in get_scn_max_args()
351 .spsr = read_spsr(), in save_panic_regs_a32_ta()
409 .spsr = (SPSR_MODE_RW_32 << SPSR_MODE_RW_SHIFT), in save_panic_regs_a32_ta()
420 .spsr = (SPSR_64_MODE_EL0 << SPSR_64_MODE_EL_SHIFT), in save_panic_regs_a64_ta()
/optee_os/core/arch/arm/include/kernel/
A Dthread.h106 uint32_t spsr; member
157 uint64_t spsr; member
164 uint32_t spsr; member
179 uint64_t spsr; member
/optee_os/core/arch/arm/sm/
A Dsm_a32.S22 mrs r2, spsr

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