Home
last modified time | relevance | path

Searched refs:x1 (Results 1 – 25 of 41) sorted by relevance

12

/optee_os/core/arch/arm/kernel/
A Dentry_a64.S31 ldr w1, [x1]
32 mul x1, x0, x1
103 add x1, x1, x2 /* __data_end + len */
124 add x1, x1, x2
176 sub x1, x1, x0
256 sub x1, x1, x0
287 sub x1, x1, x0
394 orr x1, x1, #SCTLR_M
400 add x1, x1, x6
410 orr x1, x1, #SCTLR_I
[all …]
A Dthread_a64.S43 mov sp, x1
199 add x1, x1, x0
475 sub x1, x1, x0
482 ldr x1, [x1]
488 sub x1, x1, x0
489 br x1
575 add x1, x0, x1
581 cmp x0, x1
624 mov x1, sp
636 ldp x0, x1, [x1, #THREAD_CORE_LOCAL_X0]
[all …]
A Dcache_helpers_a64.S30 add x1, x0, x1
36 cmp x0, x1
110 lsr x1, x0, x2 // extract cache type bits from clidr
111 and x1, x1, #7 // mask the bits for current cache only
112 cmp x1, #2 // see what cache we have at this level
117 mrs x1, ccsidr_el1 // read the new ccsidr
118 and x2, x1, #7 // extract the length of the cache lines
120 ubfx x4, x1, #3, #10 // maximum way number
228 add x1, x0, x1
234 cmp x0, x1
A Dthread_optee_smc_a64.S77 mov x1, x0
86 mov x1, x0
95 mov x1, x0
104 mov x1, x0
113 mov x1, x0
122 mov x1, x0
171 mrs x1, daif
172 orr x1, x1, #(SPSR_64_MODE_EL1 << SPSR_64_MODE_EL_SHIFT)
177 push x1, x30
184 pop x1, xzr /* Match "push x1, x30" above */
[all …]
A Dthread_spmc_a64.S20 mov x1, #FFA_TARGET_INFO_MBZ /* Target info MBZ */
81 mov x1, #0 /* Pass NULL pointer for caller_sp, coming from NW */
108 mrs x1, daif
109 orr x1, x1, #(SPSR_64_MODE_EL1 << SPSR_64_MODE_EL_SHIFT)
114 push x1, x30
121 pop x1, xzr /* Match "push x1, x30" above */
172 mov x1, #THREAD_CTX_SIZE
174 madd x1, x1, x0, x2
175 ldr w1, [x1, #THREAD_CTX_TSD_RPC_TARGET_INFO]
A Dmisc_a64.S38 ubfx x1, x3, #MPIDR_AFF2_SHIFT, #MPIDR_AFFINITY_BITS
39 add x0, x0, x1, LSL #(CFG_CORE_CLUSTER_SHIFT)
46 ubfx x1, x3, #MPIDR_AFF1_SHIFT, #MPIDR_AFFINITY_BITS
48 add x1, x1, x2, LSL #(CFG_CORE_CLUSTER_SHIFT)
49 add x0, x0, x1, LSL #(CFG_CORE_THREAD_SHIFT)
A Dspin_lock_a64.S76 mov x1, x0
78 .loop: ldaxr w0, [x1]
80 stxr w0, w2, [x1]
/optee_os/core/arch/arm/tee/
A Darch_svc_a64.S17 uint64_t x1;
35 stp x0, x1, [sp, #SC_REC_X0]
57 sub x1, x6, #0x4
58 lsl x1, x1, #3
62 cmp x1, x0
63 csel x0, x1, x0, ge
74 mov x1, x5
115 ldr w3, [x1], #4
177 mov x1, #0 /* panic = false */
192 mov x1, #1 /* panic = true */
A Darch_svc.c396 .x1 = pushed[2], in save_panic_regs_a32_ta()
433 (uaddr_t)regs->x1, in save_panic_stack()
439 (uaddr_t)regs->x1); in save_panic_stack()
448 save_panic_regs_a32_ta(tsd, (uint32_t *)regs->x1); in save_panic_stack()
450 save_panic_regs_a64_ta(tsd, (uint64_t *)regs->x1); in save_panic_stack()
477 regs->x1 = panic; in tee_svc_sys_return_helper()
/optee_os/out/arm/ldelf/
A Dldelf.dmp422 d0: 8b080021 add x1, x1, x8
445 110: 8b030021 add x1, x1, x3
1542 bcc: cb000021 sub x1, x1, x0
2622 17b0: f9400021 ldr x1, [x1]
3306 1f38: 91000421 add x1, x1, #0x1
3369 1fe4: 91000421 add x1, x1, #0x1
5197 32e8: 91000421 add x1, x1, #0x1
7936 503c: 91000421 add x1, x1, #0x1
8721 5888: d1000421 sub x1, x1, #0x1
9855 65f8: 91000421 add x1, x1, #0x1
[all …]
/optee_os/core/arch/arm/plat-marvell/otx2/
A Dcore_pos.S10 ubfx x1, x0, #MPIDR_AFF0_SHIFT, #MPIDR_AFFINITY_BITS
12 mul x1, x1, x2
14 add x0, x1, x2
/optee_os/out/arm/core/
A Dtee.dmp3112 e100838: b2400021 orr x1, x1, #0x1
10815 e107000: 91000421 add x1, x1, #0x1
13621 e108ca4: d1000421 sub x1, x1, #0x1
13649 e108ce8: d1000421 sub x1, x1, #0x1
13820 e108eb8: 91000421 add x1, x1, #0x1
14294 e1093bc: d1000421 sub x1, x1, #0x1
14862 e10998c: d1000421 sub x1, x1, #0x1
16102 e10a61c: d1000421 sub x1, x1, #0x1
16253 e10a7bc: d1000421 sub x1, x1, #0x1
20794 e10d5ac: 91000421 add x1, x1, #0x1
[all …]
/optee_os/core/arch/arm/plat-rcar/
A Dcore_pos_a64.S32 ubfx x1, x3, #MPIDR_AFF2_SHIFT, #MPIDR_AFFINITY_BITS
68 lsl x1, x1, #1
69 2: add x0, x0, x1
A Dromapi_call.S24 mov x20, x1
70 mov x1, x21 /* x21: uint64_t arg2 */
/optee_os/core/lib/libtomcrypt/src/ciphers/
A Didea.c111 ushort16 x0, x1, x2, x3, t0, t1; in _process_block() local
114 _LOAD16(x1, in + 2); in _process_block()
120 x1 += m_key[i*6+1]; in _process_block()
125 t1 = t0 + (x1^x3); in _process_block()
130 t0 ^= x1; in _process_block()
131 x1 = x2^t1; in _process_block()
137 x1 += m_key[LTC_IDEA_ROUNDS*6+2]; in _process_block()
142 _STORE16(x1, out + 4); in _process_block()
/optee_os/lib/libutils/ext/arch/arm/
A Dmcount_a64.S47 adjust_pc x1, x30
52 get_lr_addr x1
63 stp x0, x1, [sp]
73 ldp x0, x1, [sp]
/optee_os/core/lib/libtomcrypt/src/stream/sosemanuk/
A Dsosemanuk.c182 #define SERPENT_LT(x0, x1, x2, x3) do { \ argument
185 x1 = x1 ^ x0 ^ x2; \
187 x1 = ROLc(x1, 1); \
189 x0 = x0 ^ x1 ^ x3; \
190 x2 = x2 ^ x3 ^ T32(x1 << 7); \
344 #define KA(zc, x0, x1, x2, x3) do { \ in sosemanuk_setiv() argument
346 x1 ^= st->kc[(zc) + 1]; \ in sosemanuk_setiv()
617 tt = XMUX(r1, s ## x1, s ## x8); \ in _sosemanuk_internal()
647 FSM(x0, x1, x2, x3, x4, x5, x6, x7, x8, x9); \ in _sosemanuk_internal()
658 #define SRD(S, x0, x1, x2, x3, ooff) do { \ in _sosemanuk_internal() argument
[all …]
/optee_os/core/arch/arm/dts/
A Dstm32mp151.dtsi124 dmas = <&dmamux1 18 0x400 0x1>,
125 <&dmamux1 19 0x400 0x1>,
126 <&dmamux1 20 0x400 0x1>,
127 <&dmamux1 21 0x400 0x1>,
128 <&dmamux1 22 0x400 0x1>;
157 dmas = <&dmamux1 23 0x400 0x1>,
158 <&dmamux1 24 0x400 0x1>,
159 <&dmamux1 25 0x400 0x1>,
160 <&dmamux1 26 0x400 0x1>,
161 <&dmamux1 27 0x400 0x1>,
[all …]
/optee_os/core/arch/arm/crypto/
A Daes_modes_armv8a_ce_a64.S231 ld1 {v0.16b}, [x1]
266 ld1 {v0.16b}, [x1], #16 /* get next pt block */
305 ld1 {v0.16b}, [x1], #16 /* get next ct block */
343 ld1 {v0.16b}, [x1], #16 /* get next pt block */
374 sub x1, x1, #16
377 ld1 {v7.16b}, [x1], #16 /* reload 1 ct block */
386 ld1 {v1.16b}, [x1], #16 /* get next ct block */
461 ld1 {v3.16b}, [x1], #16
555 ld1 {v1.16b}, [x1], #16
636 ld1 {v1.16b}, [x1], #16
[all …]
A Dghash-ce-core_a64.S249 ld1 {XL.2d}, [x1]
353 5: st1 {XL.2d}, [x1]
414 ld1 {XL.2d}, [x1]
569 st1 {XL.2d}, [x1]
622 ld1 {v0.16b}, [x1]
/optee_os/lib/libutee/arch/arm/
A Dutee_syscalls_a64.S21 stp x0, x1, [sp, #16]
27 ldp x0, x1, [sp, #16]
42 mov x1, sp
/optee_os/core/arch/arm/plat-vexpress/
A Djuno_core_pos_a64.S12 and x1, x0, #MPIDR_CPU_MASK
15 add x0, x1, x0, LSR #6
/optee_os/lib/libutils/isoc/arch/arm/
A Dsetjmp_a64.S78 stp x0, x1, [sp, #-16]!
84 ldp x0, x1, [sp], #16
/optee_os/ldelf/
A Dsyscalls_a64.S26 mov x1, sp
/optee_os/core/crypto/
A Dsm4.c118 static uint32_t sm4F(uint32_t x0, uint32_t x1, uint32_t x2, uint32_t x3, in sm4F() argument
121 return x0 ^ sm4Lt(x1 ^ x2 ^ x3 ^ rk); in sm4F()

Completed in 282 milliseconds

12