Searched refs:ccplex (Results 1 – 9 of 9) sorted by relevance
/tf-a-ffa_el3_spmc/plat/nvidia/tegra/soc/t194/drivers/mce/ |
A D | nvg.c | 61 void nvg_update_cstate_info(uint32_t cluster, uint32_t ccplex, in nvg_update_cstate_info() argument 73 if (ccplex != 0U) { in nvg_update_cstate_info() 74 val |= (((uint64_t)ccplex & CCPLEX_CSTATE_MASK) << CCPLEX_CSTATE_SHIFT) | in nvg_update_cstate_info()
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A D | mce.c | 124 nvg_update_cstate_info(cstate->cluster, cstate->ccplex, cstate->system, in mce_update_cstate_info()
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/tf-a-ffa_el3_spmc/plat/nvidia/tegra/soc/t186/drivers/mce/ |
A D | nvg.c | 47 int32_t nvg_update_cstate_info(uint32_t ari_base, uint32_t cluster, uint32_t ccplex, in nvg_update_cstate_info() argument 62 if (ccplex != 0U) { in nvg_update_cstate_info() 63 val |= (((uint64_t)ccplex & CCPLEX_CSTATE_MASK) << CCPLEX_CSTATE_SHIFT) | in nvg_update_cstate_info()
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A D | ari.c | 160 int32_t ari_update_cstate_info(uint32_t ari_base, uint32_t cluster, uint32_t ccplex, in ari_update_cstate_info() argument 176 if (ccplex != 0U) { in ari_update_cstate_info() 177 val |= ((ccplex & CCPLEX_CSTATE_MASK) << CCPLEX_CSTATE_SHIFT) | in ari_update_cstate_info()
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A D | mce.c | 420 cstate->ccplex, cstate->system, cstate->system_state_force, in mce_update_cstate_info()
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/tf-a-ffa_el3_spmc/plat/nvidia/tegra/include/drivers/ |
A D | mce.h | 55 uint32_t ccplex; member
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/tf-a-ffa_el3_spmc/plat/nvidia/tegra/soc/t194/drivers/include/ |
A D | mce_private.h | 49 void nvg_update_cstate_info(uint32_t cluster, uint32_t ccplex,
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/tf-a-ffa_el3_spmc/plat/nvidia/tegra/soc/t186/drivers/include/ |
A D | mce_private.h | 97 uint32_t ccplex, 223 int32_t ari_update_cstate_info(uint32_t ari_base, uint32_t cluster, uint32_t ccplex, 246 int32_t nvg_update_cstate_info(uint32_t ari_base, uint32_t cluster, uint32_t ccplex,
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/tf-a-ffa_el3_spmc/plat/nvidia/tegra/soc/t194/ |
A D | plat_psci_handlers.c | 123 .ccplex = (uint32_t)TEGRA_NVG_CG_CG7, in tegra_soc_pwr_domain_suspend() 221 cstate_info.ccplex = (uint32_t)TEGRA_NVG_CG_CG7; in tegra_get_afflvl1_pwr_state()
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