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Searched refs:cluster (Results 1 – 25 of 78) sorted by relevance

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/tf-a-ffa_el3_spmc/plat/allwinner/common/
A Dsunxi_cpu_ops.c29 mmio_write_32(SUNXI_CPU_POWER_CLAMP_REG(cluster, core), 0xff); in sunxi_cpu_disable_power()
51 unsigned int cluster = MPIDR_AFFLVL1_VAL(mpidr); in sunxi_cpu_off() local
62 mmio_clrbits_32(SUNXI_POWERON_RST_REG(cluster), BIT(core)); in sunxi_cpu_off()
64 sunxi_cpu_disable_power(cluster, core); in sunxi_cpu_off()
69 unsigned int cluster = MPIDR_AFFLVL1_VAL(mpidr); in sunxi_cpu_on() local
77 mmio_clrbits_32(SUNXI_POWERON_RST_REG(cluster), BIT(core)); in sunxi_cpu_on()
79 mmio_setbits_32(SUNXI_AA64nAA32_REG(cluster), in sunxi_cpu_on()
82 sunxi_cpu_enable_power(cluster, core); in sunxi_cpu_on()
96 unsigned int cluster; in sunxi_cpu_power_off_others() local
99 for (cluster = 0; cluster < PLATFORM_CLUSTER_COUNT; ++cluster) { in sunxi_cpu_power_off_others()
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A Dsunxi_topology.c23 unsigned int cluster = MPIDR_AFFLVL1_VAL(mpidr); in plat_core_pos_by_mpidr() local
28 cluster >= PLATFORM_CLUSTER_COUNT || in plat_core_pos_by_mpidr()
33 return cluster * PLATFORM_MAX_CPUS_PER_CLUSTER + core; in plat_core_pos_by_mpidr()
/tf-a-ffa_el3_spmc/plat/hisilicon/hikey960/drivers/pwrc/
A Dhisi_pwrc.c40 #define CPUIDLE_FLAG_REG(cluster) \ argument
99 lock_id = (cluster << 2) + core; in hisi_cpuhotplug_lock()
108 lock_id = (cluster << 2) + core; in hisi_cpuhotplug_unlock()
170 hisi_cpuhotplug_lock(cluster, core); in hisi_set_cluster_pwdn_flag()
174 val |= (value << (2 * cluster)); in hisi_set_cluster_pwdn_flag()
184 hisi_cpuhotplug_lock(cluster, core); in hisi_get_cpu_boot_flag()
186 val = val >> (16 + (cluster << 2)); in hisi_get_cpu_boot_flag()
197 hisi_cpuhotplug_lock(cluster, core); in hisi_test_cpu_down()
199 val = val >> (16 + (cluster << 2)); in hisi_test_cpu_down()
236 if (cluster == 0) in cluster_is_powered_on()
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A Dhisi_pwrc.h33 void hisi_cpuidle_lock(unsigned int cluster, unsigned int core);
34 void hisi_cpuidle_unlock(unsigned int cluster, unsigned int core);
35 void hisi_set_cpuidle_flag(unsigned int cluster, unsigned int core);
39 int cluster_is_powered_on(unsigned int cluster);
40 void hisi_enter_core_idle(unsigned int cluster, unsigned int core);
47 void hisi_pdc_mask_cluster_wakeirq(unsigned int cluster);
49 void hisi_disable_pdc(unsigned int cluster);
50 void hisi_enable_pdc(unsigned int cluster);
51 void hisi_powerup_core(unsigned int cluster, unsigned int core);
52 void hisi_powerdn_core(unsigned int cluster, unsigned int core);
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/tf-a-ffa_el3_spmc/plat/mediatek/mt8183/drivers/spmc/
A Dmtspmc.c26 if (cluster) in set_retention()
34 if (cluster) in set_retention()
44 set_retention(cluster, 1); in spm_enable_cpu_auto_off()
63 assert(cluster); in spm_enable_cluster_auto_off()
80 if (cluster) { in mcucfg_set_bootaddr()
97 if (cluster) { in mcucfg_get_bootaddr()
113 i = cluster ? 16 : 12; in mcucfg_init_archstate()
150 i = (cluster) ? 16 : 9; in spm_get_cpu_powerstate()
292 if (cluster) { in spm_poweroff_cluster()
299 if (cluster) in spm_poweroff_cluster()
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A Dmtspmc.h23 void spm_poweron_cpu(int cluster, int cpu);
24 void spm_poweroff_cpu(int cluster, int cpu);
26 void spm_poweroff_cluster(int cluster);
27 void spm_poweron_cluster(int cluster);
29 int spm_get_cpu_powerstate(int cluster, int cpu);
30 int spm_get_cluster_powerstate(int cluster);
33 void spm_enable_cpu_auto_off(int cluster, int cpu);
34 void spm_disable_cpu_auto_off(int cluster, int cpu);
35 void spm_set_cpu_power_off(int cluster, int cpu);
36 void spm_enable_cluster_auto_off(int cluster);
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/tf-a-ffa_el3_spmc/plat/mediatek/mt8183/
A Dplat_pm.c112 #define CPU_IDX(cluster, cpu) ((cluster << 2) + cpu) argument
172 if (cluster > 0) in plat_cluster_pwrdwn_common()
182 if (cluster > 0) { in plat_cluster_pwron_common()
215 mcdi_pause_clr(cluster, CPU_IDX(cluster, cpu), OFF); in mcdi_ctrl_before_hotplug_on()
216 mcdi_pause_set(cluster, CPU_IDX(cluster, cpu), ON); in mcdi_ctrl_before_hotplug_on()
224 CPU_IDX(cluster, cpu), OFF); in mcdi_ctrl_before_hotplug_off()
256 mcdi_hotplug_clr(cluster, CPU_IDX(cluster, cpu), OFF); in hotplug_ctrl_cluster_on()
262 spm_poweron_cluster(cluster); in hotplug_ctrl_cluster_on()
269 mcdi_hotplug_set(cluster, CPU_IDX(cluster, cpu), ON); in hotplug_ctrl_cpu_on()
279 mcdi_hotplug_clr(cluster, CPU_IDX(cluster, cpu), ON); in hotplug_ctrl_cpu_on_finish()
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/tf-a-ffa_el3_spmc/plat/mediatek/mt8195/drivers/spmc/
A Dmtspmc.h14 void spm_poweron_cpu(unsigned int cluster, unsigned int cpu);
15 void spm_poweroff_cpu(unsigned int cluster, unsigned int cpu);
17 void spm_poweroff_cluster(unsigned int cluster);
18 void spm_poweron_cluster(unsigned int cluster);
20 bool spm_get_cpu_powerstate(unsigned int cluster, unsigned int cpu);
21 bool spm_get_cluster_powerstate(unsigned int cluster);
24 void mcucfg_init_archstate(unsigned int cluster, unsigned int cpu, bool arm64);
25 void mcucfg_set_bootaddr(unsigned int cluster, unsigned int cpu, uintptr_t bootaddr);
26 uintptr_t mcucfg_get_bootaddr(unsigned int cluster, unsigned int cpu);
28 void mcucfg_disable_gic_wakeup(unsigned int cluster, unsigned int cpu);
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A Dmtspmc.c30 assert(cluster == 0U); in mcucfg_set_bootaddr()
37 assert(cluster == 0U); in mcucfg_get_bootaddr()
46 assert(cluster == 0U); in mcucfg_init_archstate()
48 reg = per_cluster(cluster, MCUCFG_INITARCH); in mcucfg_init_archstate()
71 bool spm_get_cluster_powerstate(unsigned int cluster) in spm_get_cluster_powerstate() argument
73 assert(cluster == 0U); in spm_get_cluster_powerstate()
82 assert(cluster == 0U); in spm_get_cpu_powerstate()
117 void spm_poweron_cpu(unsigned int cluster, unsigned int cpu) in spm_poweron_cpu() argument
128 while (!spm_get_cpu_powerstate(cluster, cpu)) { in spm_poweron_cpu()
151 void spm_poweroff_cluster(unsigned int cluster) in spm_poweroff_cluster() argument
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/tf-a-ffa_el3_spmc/plat/hisilicon/hikey/
A Dhisi_ipc.c38 unsigned int cluster) in hisi_cpus_pd_in_cluster_besides_curr() argument
44 val = val >> (cluster * 16); in hisi_cpus_pd_in_cluster_besides_curr()
104 offset = cluster * 16 + cpu * 4; in hisi_ipc_cpu_on_off()
106 offset = cluster * 16 + cpu * 4 + 1; in hisi_ipc_cpu_on_off()
116 hisi_ipc_send(cpu_ipc_num[cluster][cpu]); in hisi_ipc_cpu_on_off()
136 offset = cluster * 4; in hisi_ipc_cluster_on_off()
138 offset = cluster * 4 + 1; in hisi_ipc_cluster_on_off()
148 hisi_ipc_send(cpu_ipc_num[cluster][cpu]); in hisi_ipc_cluster_on_off()
166 offset = cluster * 16 + cpu * 4 + 2; in hisi_ipc_cpu_suspend()
174 hisi_ipc_send(cpu_ipc_num[cluster][cpu]); in hisi_ipc_cpu_suspend()
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A Dhikey_pm.c34 int cpu, cluster; in hikey_pwr_domain_on() local
37 cluster = MPIDR_AFFLVL1_VAL(mpidr); in hikey_pwr_domain_on()
40 if (cluster != curr_cluster) in hikey_pwr_domain_on()
41 hisi_ipc_cluster_on(cpu, cluster); in hikey_pwr_domain_on()
45 hisi_ipc_cpu_on(cpu, cluster); in hikey_pwr_domain_on()
53 int cpu, cluster; in hikey_pwr_domain_on_finish() local
56 cluster = MPIDR_AFFLVL1_VAL(mpidr); in hikey_pwr_domain_on_finish()
79 int cpu, cluster; in hikey_pwr_domain_off() local
86 hisi_ipc_cpu_off(cpu, cluster); in hikey_pwr_domain_off()
101 unsigned int cluster = in hikey_pwr_domain_suspend() local
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A Dhisi_pwrc.c25 void hisi_pwrc_set_core_bx_addr(unsigned int core, unsigned int cluster, in hisi_pwrc_set_core_bx_addr() argument
36 i = cluster * CLUSTER_CORE_COUNT + core; in hisi_pwrc_set_core_bx_addr()
40 void hisi_pwrc_set_cluster_wfi(unsigned int cluster) in hisi_pwrc_set_cluster_wfi() argument
44 if (cluster == 0) { in hisi_pwrc_set_cluster_wfi()
48 } else if (cluster == 1) { in hisi_pwrc_set_cluster_wfi()
55 void hisi_pwrc_enable_debug(unsigned int core, unsigned int cluster) in hisi_pwrc_enable_debug() argument
59 enable = 1U << (core + PDBGUP_CLUSTER1_SHIFT * cluster); in hisi_pwrc_enable_debug()
/tf-a-ffa_el3_spmc/plat/mediatek/mt8192/drivers/spmc/
A Dmtspmc.h14 void spm_poweron_cpu(uint32_t cluster, uint32_t cpu);
15 void spm_poweroff_cpu(uint32_t cluster, uint32_t cpu);
17 void spm_poweroff_cluster(uint32_t cluster);
18 void spm_poweron_cluster(uint32_t cluster);
20 bool spm_get_cpu_powerstate(uint32_t cluster, uint32_t cpu);
21 bool spm_get_cluster_powerstate(uint32_t cluster);
24 void mcucfg_init_archstate(uint32_t cluster, uint32_t cpu, bool arm64);
25 void mcucfg_set_bootaddr(uint32_t cluster, uint32_t cpu, uintptr_t bootaddr);
26 uintptr_t mcucfg_get_bootaddr(uint32_t cluster, uint32_t cpu);
28 void mcucfg_disable_gic_wakeup(uint32_t cluster, uint32_t cpu);
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A Dmtspmc.c30 assert(cluster == 0U); in mcucfg_set_bootaddr()
37 assert(cluster == 0U); in mcucfg_get_bootaddr()
46 assert(cluster == 0U); in mcucfg_init_archstate()
48 reg = per_cluster(cluster, MCUCFG_INITARCH); in mcucfg_init_archstate()
71 bool spm_get_cluster_powerstate(uint32_t cluster) in spm_get_cluster_powerstate() argument
73 assert(cluster == 0U); in spm_get_cluster_powerstate()
82 assert(cluster == 0U); in spm_get_cpu_powerstate()
124 void spm_poweron_cpu(uint32_t cluster, uint32_t cpu) in spm_poweron_cpu() argument
134 while (!spm_get_cpu_powerstate(cluster, cpu)) { in spm_poweron_cpu()
162 void spm_poweroff_cluster(uint32_t cluster) in spm_poweroff_cluster() argument
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/tf-a-ffa_el3_spmc/plat/hisilicon/hikey960/
A Dhikey960_pm.c65 unsigned int cluster = in hikey960_pwr_domain_on() local
75 hisi_powerup_core(cluster, core); in hikey960_pwr_domain_on()
96 unsigned int cluster = in hikey960_pwr_domain_off() local
106 hisi_powerdn_core(cluster, core); in hikey960_pwr_domain_off()
192 unsigned int cluster = in hikey960_pwr_domain_suspend() local
205 hisi_cpuidle_lock(cluster, core); in hikey960_pwr_domain_suspend()
218 hisi_disable_pdc(cluster); in hikey960_pwr_domain_suspend()
232 hisi_enable_pdc(cluster); in hikey960_pwr_domain_suspend()
245 hisi_enable_pdc(cluster); in hikey960_pwr_domain_suspend()
268 unsigned int cluster = in hikey960_pwr_domain_suspend_finish() local
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/tf-a-ffa_el3_spmc/plat/mediatek/mt8183/drivers/mcdi/
A Dmtk_mcdi.h14 void sspm_cluster_pwr_off_notify(uint32_t cluster);
15 void sspm_cluster_pwr_on_notify(uint32_t cluster);
25 void mcdi_pause_set(int cluster, int cpu_idx, bool on);
26 void mcdi_pause_clr(int cluster, int cpu_idx, bool on);
27 void mcdi_hotplug_set(int cluster, int cpu_idx, bool on);
28 void mcdi_hotplug_clr(int cluster, int cpu_idx, bool on);
29 void mcdi_hotplug_wait_ack(int cluster, int cpu_idx, bool on);
A Dmtk_mcdi.c28 void sspm_cluster_pwr_off_notify(uint32_t cluster) in sspm_cluster_pwr_off_notify() argument
33 void sspm_cluster_pwr_on_notify(uint32_t cluster) in sspm_cluster_pwr_on_notify() argument
93 if (cluster >= 0) in target_mask()
94 t |= BIT(cluster + CLUSTER_ON_OFS); in target_mask()
99 if (cluster >= 0) in target_mask()
100 t |= BIT(cluster + CLUSTER_OFF_OFS); in target_mask()
111 uint32_t tgt = target_mask(cluster, cpu_idx, on); in mcdi_pause_clr()
120 uint32_t tgt = target_mask(cluster, cpu_idx, on); in mcdi_pause_set()
157 uint32_t tgt = target_mask(cluster, cpu_idx, on); in mcdi_hotplug_wait_ack()
167 uint32_t tgt = target_mask(cluster, cpu_idx, on); in mcdi_hotplug_clr()
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/tf-a-ffa_el3_spmc/plat/hisilicon/hikey/include/
A Dhisi_ipc.h37 void hisi_ipc_cpu_on(unsigned int cpu, unsigned int cluster);
38 void hisi_ipc_cpu_off(unsigned int cpu, unsigned int cluster);
39 void hisi_ipc_cpu_suspend(unsigned int cpu, unsigned int cluster);
40 void hisi_ipc_cluster_on(unsigned int cpu, unsigned int cluster);
41 void hisi_ipc_cluster_off(unsigned int cpu, unsigned int cluster);
42 void hisi_ipc_cluster_suspend(unsigned int cpu, unsigned int cluster);
A Dhisi_pwrc.h14 unsigned int cluster,
17 unsigned int cluster);
/tf-a-ffa_el3_spmc/drivers/marvell/
A Dap807_clocks_init.c15 #define AP807_CPU_ARO_CTRL(cluster) \ argument
16 (MVEBU_RFU_BASE + 0x82A8 + (0xA58 * (cluster)))
36 #define AP807_CPU_PLL_CTRL(cluster) \ argument
37 (MVEBU_RFU_BASE + 0x82E0 + (0x8 * (cluster)))
39 #define AP807_CPU_PLL_PARAM(cluster) AP807_CPU_PLL_CTRL(cluster) argument
40 #define AP807_CPU_PLL_CFG(cluster) (AP807_CPU_PLL_CTRL(cluster) + 0x4) argument
/tf-a-ffa_el3_spmc/plat/ti/k3/common/
A Dk3_topology.c28 unsigned int cluster = MPIDR_AFFLVL1_VAL(mpidr); in plat_core_pos_by_mpidr() local
36 if (cluster > 0) in plat_core_pos_by_mpidr()
38 if (cluster > 1) in plat_core_pos_by_mpidr()
40 if (cluster > 2) in plat_core_pos_by_mpidr()
42 if (cluster > 3) in plat_core_pos_by_mpidr()
/tf-a-ffa_el3_spmc/plat/hisilicon/hikey960/include/
A Dhisi_ipc.h15 void hisi_ipc_pm_on_off(unsigned int core, unsigned int cluster,
17 void hisi_ipc_pm_suspend(unsigned int core, unsigned int cluster,
19 void hisi_ipc_psci_system_off(unsigned int core, unsigned int cluster);
20 void hisi_ipc_psci_system_reset(unsigned int core, unsigned int cluster,
/tf-a-ffa_el3_spmc/plat/hisilicon/hikey960/drivers/ipc/
A Dhisi_ipc.c133 void hisi_ipc_pm_on_off(unsigned int core, unsigned int cluster, in hisi_ipc_pm_on_off() argument
141 cmdtype = IPC_CMD_TYPE(0, cluster, mode, 0x3); in hisi_ipc_pm_on_off()
143 source = cluster ? SRC_A7 : SRC_A15; in hisi_ipc_pm_on_off()
147 void hisi_ipc_pm_suspend(unsigned int core, unsigned int cluster, in hisi_ipc_pm_suspend() argument
158 cmdtype = IPC_CMD_TYPE(0, cluster, 0x1, 0x3 + affinity_level); in hisi_ipc_pm_suspend()
161 source = cluster ? SRC_A7 : SRC_A15; in hisi_ipc_pm_suspend()
165 void hisi_ipc_psci_system_off(unsigned int core, unsigned int cluster) in hisi_ipc_psci_system_off() argument
174 source = cluster ? SRC_A7 : SRC_A15; in hisi_ipc_psci_system_off()
178 void hisi_ipc_psci_system_reset(unsigned int core, unsigned int cluster, in hisi_ipc_psci_system_reset() argument
188 source = cluster ? SRC_A7 : SRC_A15; in hisi_ipc_psci_system_reset()
/tf-a-ffa_el3_spmc/drivers/arm/css/scpi/
A Dcss_scpi.c188 int power_state, cpu, cluster, rc = -1; in scpi_get_css_power_state() local
200 cluster = (mpidr >> MPIDR_AFF2_SHIFT) & MPIDR_AFFLVL_MASK; in scpi_get_css_power_state()
203 cluster = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK; in scpi_get_css_power_state()
205 if (cpu >= 8 || cluster >= 0xf) in scpi_get_css_power_state()
226 if (!CHECK_RESPONSE(response, cluster)) in scpi_get_css_power_state()
230 power_state = *(((uint16_t *) SCPI_RES_PAYLOAD_SCP_TO_AP) + cluster); in scpi_get_css_power_state()
231 if (CLUSTER_ID(power_state) != cluster) in scpi_get_css_power_state()
/tf-a-ffa_el3_spmc/plat/brcm/common/
A Dbrcm_scpi.c183 int power_state, cpu, cluster, rc = -1; in scpi_get_brcm_power_state() local
190 cluster = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK; in scpi_get_brcm_power_state()
191 if (cpu >= 8 || cluster >= 0xf) in scpi_get_brcm_power_state()
211 if (!CHECK_RESPONSE(response, cluster)) in scpi_get_brcm_power_state()
215 power_state = *(((uint16_t *) SCPI_RES_PAYLOAD_SCP_TO_AP) + cluster); in scpi_get_brcm_power_state()
216 if (CLUSTER_ID(power_state) != cluster) in scpi_get_brcm_power_state()

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