| /tf-a-ffa_el3_spmc/plat/common/ |
| A D | plat_bl1_common.c | 86 meminfo_t *bl2_secram_layout; in bl1_plat_handle_post_image_load()
87 meminfo_t *bl1_secram_layout; in bl1_plat_handle_post_image_load()
111 bl2_secram_layout = (meminfo_t *) bl1_secram_layout->total_base; in bl1_plat_handle_post_image_load()
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| /tf-a-ffa_el3_spmc/plat/arm/board/fvp/ |
| A D | fvp_bl1_setup.c | 95 meminfo_t *bl2_tzram_layout; in bl1_plat_handle_post_image_load()
96 meminfo_t *bl1_tzram_layout; in bl1_plat_handle_post_image_load()
124 bl2_tzram_layout = (meminfo_t *)bl1_tzram_layout->total_base; in bl1_plat_handle_post_image_load()
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| /tf-a-ffa_el3_spmc/plat/qemu/common/ |
| A D | qemu_bl1_setup.c | 18 static meminfo_t bl1_tzram_layout;
21 meminfo_t *bl1_plat_sec_mem_layout(void) in bl1_plat_sec_mem_layout()
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| A D | qemu_bl2_setup.c | 27 static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE);
32 meminfo_t *mem_layout = (void *)arg1; in bl2_early_platform_setup2()
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| /tf-a-ffa_el3_spmc/plat/hisilicon/poplar/ |
| A D | bl1_plat_setup.c | 29 static meminfo_t bl1_tzram_layout;
30 static meminfo_t bl2_tzram_layout;
59 flush_dcache_range((uintptr_t)&bl2_tzram_layout, sizeof(meminfo_t)); in bl1_plat_handle_post_image_load()
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| /tf-a-ffa_el3_spmc/plat/layerscape/common/ |
| A D | ls_bl1_setup.c | 14 static meminfo_t bl1_tzram_layout;
16 meminfo_t *bl1_plat_sec_mem_layout(void) in bl1_plat_sec_mem_layout()
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| A D | ls_bl2_setup.c | 17 static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE);
24 void ls_bl2_early_platform_setup(meminfo_t *mem_layout) in ls_bl2_early_platform_setup()
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| /tf-a-ffa_el3_spmc/plat/rpi/rpi3/ |
| A D | rpi3_bl2_setup.c | 25 static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE);
51 meminfo_t *mem_layout = (meminfo_t *) arg1; in bl2_early_platform_setup2()
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| A D | rpi3_bl1_setup.c | 20 static meminfo_t bl1_tzram_layout;
22 meminfo_t *bl1_plat_sec_mem_layout(void) in bl1_plat_sec_mem_layout()
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| /tf-a-ffa_el3_spmc/plat/marvell/armada/common/ |
| A D | marvell_bl1_setup.c | 26 static meminfo_t bl1_ram_layout;
28 meminfo_t *bl1_plat_sec_mem_layout(void) in bl1_plat_sec_mem_layout()
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| A D | marvell_bl2_setup.c | 27 static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE);
35 meminfo_t *bl2_plat_sec_mem_layout(void) in bl2_plat_sec_mem_layout()
46 void marvell_bl2_early_platform_setup(meminfo_t *mem_layout) in marvell_bl2_early_platform_setup()
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| /tf-a-ffa_el3_spmc/plat/brcm/common/ |
| A D | brcm_bl2_setup.c | 22 static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE);
48 meminfo_t *mem_layout) in bcm_bl2_early_platform_setup()
75 bcm_bl2_early_platform_setup((uintptr_t)arg0, (meminfo_t *)arg1); in bl2_early_platform_setup2()
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| /tf-a-ffa_el3_spmc/include/bl1/ |
| A D | bl1.h | 98 void bl1_calc_bl2_mem_layout(const meminfo_t *bl1_mem_layout,
99 meminfo_t *bl2_mem_layout);
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| /tf-a-ffa_el3_spmc/plat/arm/board/a5ds/ |
| A D | a5ds_bl2_setup.c | 12 arm_bl2_early_platform_setup((uintptr_t)arg0, (meminfo_t *)arg1); in bl2_early_platform_setup2()
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| /tf-a-ffa_el3_spmc/plat/layerscape/board/ls1043/ |
| A D | ls1043_bl2_setup.c | 15 ls_bl2_early_platform_setup((meminfo_t *)arg1); in bl2_early_platform_setup2()
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| /tf-a-ffa_el3_spmc/bl1/ |
| A D | bl1_main.c | 37 void bl1_calc_bl2_mem_layout(const meminfo_t *bl1_mem_layout, in bl1_calc_bl2_mem_layout()
38 meminfo_t *bl2_mem_layout) in bl1_calc_bl2_mem_layout()
51 flush_dcache_range((uintptr_t)bl2_mem_layout, sizeof(meminfo_t)); in bl1_calc_bl2_mem_layout()
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| /tf-a-ffa_el3_spmc/plat/arm/board/fvp_ve/ |
| A D | fvp_ve_bl2_setup.c | 18 arm_bl2_early_platform_setup((uintptr_t)arg0, (meminfo_t *)arg1); in bl2_early_platform_setup2()
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| /tf-a-ffa_el3_spmc/plat/arm/css/common/ |
| A D | css_bl2u_setup.c | 25 void bl2u_early_platform_setup(meminfo_t *mem_layout, void *plat_info) in bl2u_early_platform_setup()
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| A D | css_bl2_setup.c | 59 arm_bl2_early_platform_setup((uintptr_t)arg0, (meminfo_t *)arg1); in bl2_early_platform_setup2()
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| /tf-a-ffa_el3_spmc/plat/hisilicon/hikey/ |
| A D | hikey_bl1_setup.c | 28 static meminfo_t bl1_tzram_layout;
38 meminfo_t *bl1_plat_sec_mem_layout(void) in bl1_plat_sec_mem_layout()
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| /tf-a-ffa_el3_spmc/plat/layerscape/common/include/ |
| A D | plat_ls.h | 19 void ls_bl2_early_platform_setup(meminfo_t *mem_layout);
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| /tf-a-ffa_el3_spmc/plat/arm/common/ |
| A D | arm_bl2_setup.c | 28 static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE);
84 arm_bl2_early_platform_setup((uintptr_t)arg0, (meminfo_t *)arg1); in bl2_early_platform_setup2()
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| A D | arm_bl2_el3_setup.c | 23 static meminfo_t bl2_el3_tzram_layout;
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| /tf-a-ffa_el3_spmc/include/plat/marvell/armada/a3k/common/ |
| A D | plat_marvell.h | 64 void marvell_bl2_early_platform_setup(meminfo_t *mem_layout);
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| /tf-a-ffa_el3_spmc/plat/hisilicon/hikey960/ |
| A D | hikey960_bl1_setup.c | 43 static meminfo_t bl1_tzram_layout;
64 meminfo_t *bl1_plat_sec_mem_layout(void) in bl1_plat_sec_mem_layout()
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