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Searched refs:CPU_MIDR (Results 1 – 6 of 6) sorted by relevance

/trusted-firmware-a/lib/cpus/aarch32/
A Dcpu_helpers.S126 ldr r4, =(__CPU_OPS_START__ + CPU_MIDR)
127 ldr r5, =(__CPU_OPS_END__ + CPU_MIDR)
152 sub r0, r4, #(CPU_OPS_SIZE + CPU_MIDR)
/trusted-firmware-a/include/lib/cpus/aarch32/
A Dcpu_macros.S72 .equ CPU_MIDR, 0 define
73 .equ CPU_RESET_FUNC, CPU_MIDR + CPU_MIDR_SIZE
/trusted-firmware-a/lib/cpus/aarch64/
A Dcpu_helpers.S165 adr x5, (__CPU_OPS_END__ + CPU_MIDR)
171 adr x4, (__CPU_OPS_START__ + CPU_MIDR)
187 sub x0, x4, #(CPU_OPS_SIZE + CPU_MIDR)
/trusted-firmware-a/include/lib/cpus/aarch64/
A Dcpu_macros.S79 .equ CPU_MIDR, 0 define
80 .equ CPU_RESET_FUNC, CPU_MIDR + CPU_MIDR_SIZE
/trusted-firmware-a/build/qemu/release/bl1/
A Dbl1.dump188 0000000000000000 l *ABS* 0000000000000000 CPU_MIDR
213 0000000000000000 l *ABS* 0000000000000000 CPU_MIDR
239 0000000000000000 l *ABS* 0000000000000000 CPU_MIDR
263 0000000000000000 l *ABS* 0000000000000000 CPU_MIDR
322 0000000000000000 l *ABS* 0000000000000000 CPU_MIDR
344 0000000000000000 l *ABS* 0000000000000000 CPU_MIDR
/trusted-firmware-a/build/qemu/release/bl31/
A Dbl31.dump61 0000000000000000 l *ABS* 0000000000000000 CPU_MIDR
90 0000000000000000 l *ABS* 0000000000000000 CPU_MIDR
122 0000000000000000 l *ABS* 0000000000000000 CPU_MIDR
151 0000000000000000 l *ABS* 0000000000000000 CPU_MIDR
182 0000000000000000 l *ABS* 0000000000000000 CPU_MIDR
227 0000000000000000 l *ABS* 0000000000000000 CPU_MIDR
265 0000000000000000 l *ABS* 0000000000000000 CPU_MIDR

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