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Searched refs:CTX_GPREG_X2 (Results 1 – 18 of 18) sorted by relevance

/trusted-firmware-a/lib/cpus/aarch64/
A Dwa_cve_2017_5715_bpiall.S27 stp x2, x3, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2]
325 ldp x2, x3, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2]
339 ldp x2, x3, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2]
343 ldp x2, x3, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2]
347 ldp x2, x3, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2]
A Dcortex_a76.S41 stp x2, x3, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2]
106 ldp x2, x3, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2]
A Dneoverse_n1.S651 ldp x2, x3, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2]
/trusted-firmware-a/plat/nvidia/tegra/soc/t186/drivers/mce/
A Dmce.c210 write_ctx_reg(gp_regs, CTX_GPREG_X2, (ret64)); in mce_command_handler()
253 write_ctx_reg(gp_regs, CTX_GPREG_X2, ((ret64 == arg0) ? in mce_command_handler()
267 write_ctx_reg(gp_regs, CTX_GPREG_X2, (ret64 >> 32ULL)); in mce_command_handler()
300 write_ctx_reg(gp_regs, CTX_GPREG_X2, (arg1)); in mce_command_handler()
/trusted-firmware-a/include/arch/aarch64/
A Dsmccc_helpers.h31 write_ctx_reg((get_gpregs_ctx(_h)), (CTX_GPREG_X2), (_x2)); \
80 _x2 = read_ctx_reg(regs, CTX_GPREG_X2); \
/trusted-firmware-a/plat/nvidia/tegra/soc/t194/
A Dplat_sip_calls.c69 write_ctx_reg(get_gpregs_ctx(handle), CTX_GPREG_X2, per[1]); in plat_sip_handler()
/trusted-firmware-a/bl31/aarch64/
A Dea_delegate.S67 stp x2, x3, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2]
113 ldp x2, x3, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2]
/trusted-firmware-a/plat/nvidia/tegra/common/
A Dtegra_fiq_glue.c143 write_ctx_reg((gpregs_ctx), (uint32_t)(CTX_GPREG_X2), (val)); in tegra_fiq_get_intr_context()
/trusted-firmware-a/plat/nvidia/tegra/soc/t186/
A Dplat_sip_calls.c148 CTX_GPREG_X2, (ref_clk_ctr)); in plat_sip_handler()
/trusted-firmware-a/services/std_svc/spmd/
A Dspmd_pm.c33 write_ctx_reg(gpregs, CTX_GPREG_X2, FFA_PARAM_MBZ); in spmd_build_spmc_message()
A Dspmd_main.c203 write_ctx_reg(gpregs, CTX_GPREG_X2, 0); in spmd_secure_interrupt_handler()
/trusted-firmware-a/include/lib/el3_runtime/aarch64/
A Dcontext.h19 #define CTX_GPREG_X2 U(0x10) macro
484 write_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_X2, x2); \
/trusted-firmware-a/services/std_svc/spm_mm/
A Dspm_mm_main.c200 write_ctx_reg(get_gpregs_ctx(cpu_ctx), CTX_GPREG_X2, x2); in spm_mm_sp_call()
/trusted-firmware-a/plat/qti/qtiseclib/src/
A Dqtiseclib_cb_interface.c152 qti_ns_ctx->x2 = read_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_X2); in qtiseclib_cb_get_ns_ctx()
/trusted-firmware-a/docs/security_advisories/
A Dsecurity-advisory-tfv-8.rst50 ldp x2, x3, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2]
/trusted-firmware-a/docs/build/TF-A_2.5/_sources/security_advisories/
A Dsecurity-advisory-tfv-8.rst.txt50 ldp x2, x3, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2]
/trusted-firmware-a/services/std_svc/sdei/
A Dsdei_intr_mgmt.c330 SMC_SET_GP(ctx, CTX_GPREG_X2, disp_ctx->elr_el3); in setup_ns_dispatch()
/trusted-firmware-a/lib/el3_runtime/aarch64/
A Dcontext.S692 stp x2, x3, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2]
819 ldp x2, x3, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2]

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