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Searched refs:MPIDR_AFFLVL0_VAL (Results 1 – 24 of 24) sorted by relevance

/trusted-firmware-a/plat/imx/imx8m/
A Dimx8m_psci_common.c44 core_id = MPIDR_AFFLVL0_VAL(mpidr); in imx_pwr_domain_on()
61 unsigned int core_id = MPIDR_AFFLVL0_VAL(mpidr); in imx_pwr_domain_off()
106 unsigned int core_id = MPIDR_AFFLVL0_VAL(mpidr); in imx_domain_suspend()
128 unsigned int core_id = MPIDR_AFFLVL0_VAL(mpidr); in imx_domain_suspend_finish()
/trusted-firmware-a/plat/arm/board/fvp/
A Dfvp_topology.c93 thread_id = MPIDR_AFFLVL0_VAL(mpidr); in plat_core_pos_by_mpidr()
98 cpu_id = MPIDR_AFFLVL0_VAL(mpidr); in plat_core_pos_by_mpidr()
/trusted-firmware-a/plat/imx/imx8qx/
A Dimx8qx_psci.c70 cpu_id = MPIDR_AFFLVL0_VAL(mpidr); in imx_pwr_domain_on()
103 unsigned int cpu_id = MPIDR_AFFLVL0_VAL(mpidr); in imx_pwr_domain_off()
114 unsigned int cpu_id = MPIDR_AFFLVL0_VAL(mpidr); in imx_domain_suspend()
167 unsigned int cpu_id = MPIDR_AFFLVL0_VAL(mpidr); in imx_domain_suspend_finish()
/trusted-firmware-a/plat/hisilicon/hikey/
A Dhikey_pm.c38 cpu = MPIDR_AFFLVL0_VAL(mpidr); in hikey_pwr_domain_on()
57 cpu = MPIDR_AFFLVL0_VAL(mpidr); in hikey_pwr_domain_on_finish()
83 cpu = MPIDR_AFFLVL0_VAL(mpidr); in hikey_pwr_domain_off()
/trusted-firmware-a/plat/allwinner/common/
A Dsunxi_cpu_ops.c52 unsigned int core = MPIDR_AFFLVL0_VAL(mpidr); in sunxi_cpu_off()
70 unsigned int core = MPIDR_AFFLVL0_VAL(mpidr); in sunxi_cpu_on()
A Dsunxi_topology.c24 unsigned int core = MPIDR_AFFLVL0_VAL(mpidr); in plat_core_pos_by_mpidr()
/trusted-firmware-a/plat/imx/imx8m/imx8mq/
A Dimx8mq_psci.c46 unsigned int core_id = MPIDR_AFFLVL0_VAL(mpidr); in imx_domain_suspend()
72 unsigned int core_id = MPIDR_AFFLVL0_VAL(mpidr); in imx_domain_suspend_finish()
/trusted-firmware-a/plat/imx/imx8qm/
A Dimx8qm_psci.c78 unsigned int cpu_id = MPIDR_AFFLVL0_VAL(mpidr); in imx_pwr_domain_on()
118 unsigned int cpu_id = MPIDR_AFFLVL0_VAL(mpidr); in imx_pwr_domain_off()
137 unsigned int cpu_id = MPIDR_AFFLVL0_VAL(mpidr); in imx_domain_suspend()
213 unsigned int cpu_id = MPIDR_AFFLVL0_VAL(mpidr); in imx_domain_suspend_finish()
/trusted-firmware-a/plat/imx/common/
A Dimx8_topology.c33 cpu_id = MPIDR_AFFLVL0_VAL(mpidr); in plat_core_pos_by_mpidr()
/trusted-firmware-a/plat/ti/k3/common/
A Dk3_topology.c29 unsigned int core = MPIDR_AFFLVL0_VAL(mpidr); in plat_core_pos_by_mpidr()
/trusted-firmware-a/plat/marvell/armada/common/
A Dmarvell_topology.c57 cpu_id = MPIDR_AFFLVL0_VAL(mpidr); in marvell_check_mpidr()
/trusted-firmware-a/plat/arm/board/arm_fpga/
A Dfpga_topology.c63 (MPIDR_AFFLVL0_VAL(mpidr) >= FPGA_MAX_PE_PER_CPU)) { in plat_core_pos_by_mpidr()
/trusted-firmware-a/plat/mediatek/mt8183/
A Dplat_pm.c305 int cpu = MPIDR_AFFLVL0_VAL(mpidr); in plat_mtk_power_domain_on()
329 int cpu = MPIDR_AFFLVL0_VAL(mpidr); in plat_mtk_power_domain_off()
348 int cpu = MPIDR_AFFLVL0_VAL(mpidr); in plat_mtk_power_domain_on_finish()
364 int cpu = MPIDR_AFFLVL0_VAL(mpidr); in plat_mtk_power_domain_suspend()
/trusted-firmware-a/plat/allwinner/sun50i_h6/
A Dsunxi_power.c111 unsigned int core = MPIDR_AFFLVL0_VAL(mpidr); in sunxi_cpu_power_off_self()
/trusted-firmware-a/plat/allwinner/sun50i_h616/
A Dsunxi_power.c113 unsigned int core = MPIDR_AFFLVL0_VAL(mpidr); in sunxi_cpu_power_off_self()
/trusted-firmware-a/plat/rockchip/rk3368/drivers/pmu/
A Dpmu.c269 boot_cpu = MPIDR_AFFLVL0_VAL(read_mpidr_el1()); in nonboot_cpus_off()
301 cpu = MPIDR_AFFLVL0_VAL(mpidr); in rockchip_soc_cores_pwr_dm_on()
/trusted-firmware-a/plat/allwinner/sun50i_a64/
A Dsunxi_power.c224 unsigned int core = MPIDR_AFFLVL0_VAL(mpidr); in sunxi_cpu_power_off_self()
/trusted-firmware-a/plat/mediatek/mt8183/drivers/spm/
A Dspm_suspend.c160 int cpu = MPIDR_AFFLVL0_VAL(read_mpidr()); in go_to_sleep_before_wfi()
/trusted-firmware-a/plat/brcm/board/stingray/src/
A Dbrcm_pm_ops.c129 (1 << (standbywfi + MPIDR_AFFLVL0_VAL(mpidr))) | in brcm_power_down_common()
A Dihost_pm.c313 uint32_t coreid = MPIDR_AFFLVL0_VAL(mpidr); in ihost_power_on_secondary_core()
/trusted-firmware-a/plat/rockchip/rk3288/drivers/pmu/
A Dpmu.c255 boot_cpu = MPIDR_AFFLVL0_VAL(read_mpidr()); in nonboot_cpus_off()
/trusted-firmware-a/include/arch/aarch32/
A Darch.h43 #define MPIDR_AFFLVL0_VAL(mpidr) \ macro
/trusted-firmware-a/drivers/arm/gic/v3/
A Dgicv3_main.c1101 aff0 = MPIDR_AFFLVL0_VAL(target); in gicv3_raise_secure_g0_sgi()
/trusted-firmware-a/include/arch/aarch64/
A Darch.h47 #define MPIDR_AFFLVL0_VAL(mpidr) \ macro

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