/trusted-firmware-a/plat/mediatek/mt8173/ |
A D | power_tracer.c | 19 (mpidr & MPIDR_CLUSTER_MASK) >> MPIDR_AFFINITY_BITS, in trace_power_flow() 24 (mpidr & MPIDR_CLUSTER_MASK) >> MPIDR_AFFINITY_BITS, in trace_power_flow() 29 (mpidr & MPIDR_CLUSTER_MASK) >> MPIDR_AFFINITY_BITS, in trace_power_flow() 34 (mpidr & MPIDR_CLUSTER_MASK) >> MPIDR_AFFINITY_BITS); in trace_power_flow() 38 (mpidr & MPIDR_CLUSTER_MASK) >> MPIDR_AFFINITY_BITS); in trace_power_flow() 42 (mpidr & MPIDR_CLUSTER_MASK) >> MPIDR_AFFINITY_BITS); in trace_power_flow()
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A D | scu.c | 14 if (mpidr & MPIDR_CLUSTER_MASK) in disable_scu() 24 if (mpidr & MPIDR_CLUSTER_MASK) in enable_scu()
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/trusted-firmware-a/plat/mediatek/mt6795/ |
A D | power_tracer.c | 19 (mpidr & MPIDR_CLUSTER_MASK) >> MPIDR_AFFINITY_BITS, in trace_power_flow() 24 (mpidr & MPIDR_CLUSTER_MASK) >> MPIDR_AFFINITY_BITS, in trace_power_flow() 29 (mpidr & MPIDR_CLUSTER_MASK) >> MPIDR_AFFINITY_BITS, in trace_power_flow() 34 (mpidr & MPIDR_CLUSTER_MASK) >> MPIDR_AFFINITY_BITS); in trace_power_flow() 38 (mpidr & MPIDR_CLUSTER_MASK) >> MPIDR_AFFINITY_BITS); in trace_power_flow() 42 (mpidr & MPIDR_CLUSTER_MASK) >> MPIDR_AFFINITY_BITS); in trace_power_flow()
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A D | scu.c | 14 if (mpidr & MPIDR_CLUSTER_MASK) in disable_scu() 24 if (mpidr & MPIDR_CLUSTER_MASK) in enable_scu()
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A D | plat_pm.c | 66 clusterid = (mpidr & MPIDR_CLUSTER_MASK) >> MPIDR_AFFINITY_BITS; in get_cluster_data() 254 cluster_id = mpidr & MPIDR_CLUSTER_MASK; in plat_affinst_on() 327 cluster_id = mpidr & MPIDR_CLUSTER_MASK; in plat_affinst_suspend()
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/trusted-firmware-a/plat/mediatek/mt8183/aarch64/ |
A D | plat_helpers.S | 16 and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK) 31 and x0, x0, #MPIDR_CLUSTER_MASK
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/trusted-firmware-a/plat/mediatek/mt8173/aarch64/ |
A D | plat_helpers.S | 31 and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK) 46 and x0, x0, #MPIDR_CLUSTER_MASK
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/trusted-firmware-a/plat/mediatek/mt8173/drivers/spm/ |
A D | spm_mcdi.c | 307 int cluster_id = (mpidr & MPIDR_CLUSTER_MASK) >> MPIDR_AFFINITY_BITS; in spm_mcdi_wfi_sel_enter() 358 int cluster_id = (mpidr & MPIDR_CLUSTER_MASK) >> MPIDR_AFFINITY_BITS; in spm_mcdi_wfi_sel_leave() 408 unsigned long cluster_id = mpidr & MPIDR_CLUSTER_MASK; in spm_mcdi_set_cputop_pwrctrl_for_cluster_off() 440 unsigned long cluster_id = mpidr & MPIDR_CLUSTER_MASK; in spm_mcdi_clear_cputop_pwrctrl_for_cluster_on() 495 linear_id = ((mpidr & MPIDR_CLUSTER_MASK) >> 6) | in spm_mcdi_finish_for_on_state()
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A D | spm_hotplug.c | 240 linear_id = ((mpidr & MPIDR_CLUSTER_MASK) >> 6) | in spm_hotplug_on() 261 linear_id = ((mpidr & MPIDR_CLUSTER_MASK) >> 6) | in spm_hotplug_off()
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/trusted-firmware-a/plat/mediatek/mt8183/ |
A D | scu.c | 21 switch (mpidr & MPIDR_CLUSTER_MASK) { in disable_scu() 42 switch (mpidr & MPIDR_CLUSTER_MASK) { in enable_scu()
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/trusted-firmware-a/plat/rockchip/common/aarch32/ |
A D | plat_helpers.S | 43 and r0, r0, #MPIDR_CLUSTER_MASK 69 ldr r1, =(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK) 102 and r6, r0, #MPIDR_CLUSTER_MASK
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/trusted-firmware-a/plat/rockchip/common/aarch64/ |
A D | plat_helpers.S | 57 and x0, x0, #MPIDR_CLUSTER_MASK 79 and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK) 106 and x20, x0, #MPIDR_CLUSTER_MASK
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/trusted-firmware-a/plat/hisilicon/hikey960/ |
A D | hikey960_pm.c | 66 (mpidr & MPIDR_CLUSTER_MASK) >> MPIDR_AFFINITY_BITS; in hikey960_pwr_domain_on() 97 (mpidr & MPIDR_CLUSTER_MASK) >> MPIDR_AFFINITY_BITS; in hikey960_pwr_domain_off() 193 (mpidr & MPIDR_CLUSTER_MASK) >> MPIDR_AFFINITY_BITS; in hikey960_pwr_domain_suspend() 269 (mpidr & MPIDR_CLUSTER_MASK) >> MPIDR_AFFINITY_BITS; in hikey960_pwr_domain_suspend_finish()
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/trusted-firmware-a/plat/mediatek/mt6795/aarch64/ |
A D | plat_helpers.S | 49 and x1, x1, #MPIDR_CLUSTER_MASK 91 and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
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/trusted-firmware-a/plat/imx/common/ |
A D | imx8_helpers.S | 72 and x0, x0, #MPIDR_CLUSTER_MASK 84 and x0, x0, #MPIDR_CLUSTER_MASK
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A D | imx8_topology.c | 29 if (mpidr & ~(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)) in plat_core_pos_by_mpidr()
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/trusted-firmware-a/plat/qemu/common/aarch32/ |
A D | plat_helpers.S | 35 and r0, r0, #MPIDR_CLUSTER_MASK 49 ldr r1, =(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
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/trusted-firmware-a/plat/qemu/common/aarch64/ |
A D | plat_helpers.S | 34 and x0, x0, #MPIDR_CLUSTER_MASK 49 and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
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/trusted-firmware-a/plat/xilinx/versal/ |
A D | plat_versal.c | 12 if (mpidr & MPIDR_CLUSTER_MASK) { in plat_core_pos_by_mpidr()
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/trusted-firmware-a/plat/xilinx/zynqmp/ |
A D | plat_zynqmp.c | 12 if (mpidr & MPIDR_CLUSTER_MASK) { in plat_core_pos_by_mpidr()
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/trusted-firmware-a/plat/hisilicon/poplar/ |
A D | plat_topology.c | 26 if (mpidr & MPIDR_CLUSTER_MASK) in plat_core_pos_by_mpidr()
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/trusted-firmware-a/plat/rockchip/common/ |
A D | plat_topology.c | 30 cluster_id = mpidr & MPIDR_CLUSTER_MASK; in plat_core_pos_by_mpidr()
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/trusted-firmware-a/plat/intel/soc/common/ |
A D | socfpga_topology.c | 33 if (mpidr & ~(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)) in plat_core_pos_by_mpidr()
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/trusted-firmware-a/plat/layerscape/common/ |
A D | ls_topology.c | 19 valid_mask = ~(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK); in ls_check_mpidr()
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/trusted-firmware-a/plat/amlogic/common/ |
A D | aml_topology.c | 40 if (mpidr & ~(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)) in plat_core_pos_by_mpidr()
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