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Searched refs:hold_base (Results 1 – 6 of 6) sorted by relevance

/trusted-firmware-a/plat/arm/board/arm_fpga/
A Dfpga_pm.c35 uint64_t hold_base[PLATFORM_CORE_COUNT]; variable
54 hold_base[pos] = PLAT_FPGA_HOLD_STATE_GO; in fpga_pwr_domain_on()
55 flush_dcache_range((uintptr_t)&hold_base[pos], sizeof(uint64_t)); in fpga_pwr_domain_on()
/trusted-firmware-a/plat/rpi/common/
A Drpi3_pm.c143 uintptr_t hold_base = PLAT_RPI3_TM_HOLD_BASE; in rpi3_pwr_domain_on() local
147 hold_base += pos * PLAT_RPI3_TM_HOLD_ENTRY_SIZE; in rpi3_pwr_domain_on()
149 mmio_write_64(hold_base, PLAT_RPI3_TM_HOLD_STATE_GO); in rpi3_pwr_domain_on()
180 uintptr_t hold_base = PLAT_RPI3_TM_HOLD_BASE; in rpi3_pwr_down_wfi() local
191 mmio_write_64(hold_base, PLAT_RPI3_TM_HOLD_STATE_BSP_OFF); in rpi3_pwr_down_wfi()
/trusted-firmware-a/plat/arm/board/a5ds/
A Da5ds_pm.c19 uint64_t *hold_base = (uint64_t *)A5DS_HOLD_BASE; in a5ds_pwr_domain_on() local
21 hold_base[pos] = A5DS_HOLD_STATE_GO; in a5ds_pwr_domain_on()
/trusted-firmware-a/plat/qemu/qemu_sbsa/
A Dsbsa_pm.c136 uint64_t *hold_base = (uint64_t *)PLAT_QEMU_HOLD_BASE; in qemu_pwr_domain_on() local
142 hold_base[pos] = PLAT_QEMU_HOLD_STATE_GO; in qemu_pwr_domain_on()
/trusted-firmware-a/plat/qemu/common/
A Dqemu_pm.c144 uint64_t *hold_base = (uint64_t *)PLAT_QEMU_HOLD_BASE; in qemu_pwr_domain_on() local
146 hold_base[pos] = PLAT_QEMU_HOLD_STATE_GO; in qemu_pwr_domain_on()
/trusted-firmware-a/plat/arm/board/arm_fpga/aarch64/
A Dfpga_helpers.S77 adrp x1, hold_base
78 add x1, x1, :lo12:hold_base

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