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Searched refs:CCGR_DDR1 (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/arm/mach-imx/imx8m/
A Dclock_imx8mm.c446 clock_enable(CCGR_DDR1, 0); in clock_init()
451 clock_enable(CCGR_DDR1, 1); in clock_init()
/u-boot/arch/arm/include/asm/arch-imx8m/
A Dclock_imx8mm.h380 CCGR_DDR1 = 5, enumerator

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