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Searched refs:CONFIG_SYS_CCSRBAR (Results 1 – 25 of 71) sorted by relevance

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/u-boot/include/configs/
A Dcontrolcenterd.h102 #define CONFIG_SYS_CCSRBAR CONFIG_SYS_CCSRBAR_DEFAULT macro
104 #define CONFIG_SYS_CCSRBAR 0xffe00000 macro
106 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
107 #define CONFIG_SYS_MPC85xx_GPIO3_ADDR (CONFIG_SYS_CCSRBAR+0xf200)
158 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500)
159 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600)
189 #define CONFIG_SYS_DIU_ADDR (CONFIG_SYS_CCSRBAR + 0x10000)
A Dxpedite517x.h71 #define CONFIG_SYS_CCSRBAR 0xef000000 /* relocated CCSRBAR */ macro
72 #define CONFIG_SYS_CCSRBAR_PHYS CONFIG_SYS_CCSRBAR
73 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
75 #define CONFIG_SYS_IMMR CONFIG_SYS_CCSRBAR
189 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500)
190 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600)
313 #if (CONFIG_SYS_CCSRBAR_DEFAULT != CONFIG_SYS_CCSRBAR)
375 #define CONFIG_SYS_DBAT3L (CONFIG_SYS_CCSRBAR |\
379 #define CONFIG_SYS_DBAT3U (CONFIG_SYS_CCSRBAR |\
383 #define CONFIG_SYS_IBAT3L (CONFIG_SYS_CCSRBAR |\
A Dsbc8641d.h75 #define CONFIG_SYS_CCSRBAR 0xf8000000 /* relocated CCSRBAR */ macro
76 #define CONFIG_SYS_IMMR CONFIG_SYS_CCSRBAR /* PQII uses CONFIG_SYS_IMMR */
78 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
229 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500)
230 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600)
357 #define CONFIG_SYS_DBAT3L ( CONFIG_SYS_CCSRBAR | BATL_PP_RW \
359 #define CONFIG_SYS_DBAT3U (CONFIG_SYS_CCSRBAR | BATU_BL_4M | BATU_VS | BATU_VP)
360 #define CONFIG_SYS_IBAT3L (CONFIG_SYS_CCSRBAR | BATL_PP_RW | BATL_CACHEINHIBIT)
363 #if (CONFIG_SYS_CCSRBAR_DEFAULT != CONFIG_SYS_CCSRBAR)
A DMPC8555CDS.h32 #define CONFIG_SYS_CCSRBAR 0xe0000000 macro
33 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
224 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500)
225 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600)
A DMPC8541CDS.h32 #define CONFIG_SYS_CCSRBAR 0xe0000000 macro
33 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
226 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500)
227 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600)
A Dt4qds.h113 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x11C500)
114 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x11C600)
115 #define CONFIG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500)
116 #define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600)
A DMPC8540ADS.h60 #define CONFIG_SYS_CCSRBAR 0xe0000000 macro
61 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
203 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500)
204 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600)
A DMPC8568MDS.h37 #define CONFIG_SYS_CCSRBAR 0xe0000000 macro
38 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
204 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500)
205 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600)
A Dqemu-ppce500.h23 #define CONFIG_SYS_CCSRBAR 0xe0000000 macro
31 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
A Dxpedite520x.h49 #define CONFIG_SYS_CCSRBAR 0xef000000 macro
50 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
159 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500)
160 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600)
A Dsbc8548.h77 #define CONFIG_SYS_CCSRBAR 0xe0000000 macro
78 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
384 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500)
385 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600)
A DMPC8548CDS.h43 #define CONFIG_SYS_CCSRBAR 0xe0000000 macro
44 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
291 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500)
292 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600)
A Dxpedite537x.h65 #define CONFIG_SYS_CCSRBAR 0xef000000 macro
66 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
183 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500)
184 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600)
A Dxpedite550x.h64 #define CONFIG_SYS_CCSRBAR 0xef000000 macro
65 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
185 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500)
186 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600)
A Dkmp204x.h212 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR + 0x11C500)
213 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR + 0x11C600)
214 #define CONFIG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR + 0x11D500)
215 #define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR + 0x11D600)
A Dcyrus.h179 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x11C500)
180 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x11C600)
181 #define CONFIG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500)
182 #define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600)
A Dsocrates.h55 #define CONFIG_SYS_CCSRBAR 0xE0000000 macro
56 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
A DP2041RDB.h256 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x11C500)
257 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x11C600)
258 #define CONFIG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500)
259 #define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600)
A DUCP1020.h164 #define CONFIG_SYS_CCSRBAR 0xffe00000 macro
165 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
309 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR + 0x4500)
310 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR + 0x4600)
/u-boot/include/
A Dmpc85xx.h44 #ifndef CONFIG_SYS_CCSRBAR
45 #define CONFIG_SYS_CCSRBAR CONFIG_SYS_CCSRBAR_DEFAULT macro
64 #define CONFIG_SYS_IMMR CONFIG_SYS_CCSRBAR
A Dmpc86xx.h19 #define GUTS_SVR (CONFIG_SYS_CCSRBAR + 0xE00A4)
20 #define MCM_ABCR (CONFIG_SYS_CCSRBAR + 0x01000)
21 #define MCM_DBCR (CONFIG_SYS_CCSRBAR + 0x01008)
/u-boot/arch/powerpc/cpu/mpc86xx/
A Dmp.c36 volatile immap_t *immap = (immap_t *) CONFIG_SYS_CCSRBAR; in cpu_disable()
55 immap_t *immap = (immap_t *) CONFIG_SYS_CCSRBAR; in is_core_disabled()
128 out_be32((uint *)(CONFIG_SYS_CCSRBAR + 0x20), 0x80000000 | in setup_mp()
/u-boot/board/freescale/mpc8568mds/
A Dbcsr.c14 volatile uint* duart_mux = (uint *)(CONFIG_SYS_CCSRBAR + 0xe0060); in enable_8568mds_duart()
15 volatile uint* devices = (uint *)(CONFIG_SYS_CCSRBAR + 0xe0070); in enable_8568mds_duart()
/u-boot/arch/powerpc/include/asm/
A Dfsl_liodn.h21 + CONFIG_SYS_MPC85xx_GUTS_OFFSET + CONFIG_SYS_CCSRBAR, \
27 + CONFIG_SYS_MPC85xx_GUTS_OFFSET + CONFIG_SYS_CCSRBAR, \
29 + CONFIG_SYS_MPC85xx_GUTS_OFFSET + CONFIG_SYS_CCSRBAR, \
73 .reg_offset = off + CONFIG_SYS_CCSRBAR, \
80 .reg_offset = off + CONFIG_SYS_CCSRBAR, \
87 .reg_offset = off + CONFIG_SYS_CCSRBAR, \
/u-boot/board/xes/common/
A Dfsl_8xxx_misc.c33 volatile immap_t *immap = (immap_t *)CONFIG_SYS_CCSRBAR; in get_board_derivative()

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