Searched refs:DDR1 (Results 1 – 6 of 6) sorted by relevance
33 DDR1: 0x80000000 - 0xBFFFFFFF49 For the areas that reside within DDR1 they must not be used prior to s_init()
25 lpddr2_config_iomux(DDR1); in setup_iomux_ddr()
41 case DDR1: in lpddr2_config_iomux()
10 #define DDR1 1 macro
144 bool "Freescale DDR1 controller"
437 Freescale DDR1 controller.452 Board config to use DDR1. It can be enabled for SoCs with453 Freescale DDR1 or DDR2 controllers, depending on the board
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