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Searched refs:DDR_REFRESH_VAL_40M (Results 1 – 1 of 1) sorted by relevance

/u-boot/arch/mips/mach-ath79/ar933x/
A Dddr.c26 #define DDR_REFRESH_VAL_40M (DDR_REFRESH_EN | DDR_REFRESH(624)) macro
174 writel(DDR_REFRESH_VAL_40M, regs + in ddr_init()
218 writel(DDR_REFRESH_VAL_40M, regs + in ddr_init()

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