HHI_PCIE_PLL_CNTL1 (reference) in projects: u-boot

Searched refs:HHI_PCIE_PLL_CNTL1 (Results 1 – 3 of 3) sorted by relevance

/u-boot/arch/arm/include/asm/arch-meson/
A D	clock-axg.h	`40 #define HHI_PCIE_PLL_CNTL1 0xdC macro`
A D	clock-g12a.h	`32 #define HHI_PCIE_PLL_CNTL1 0x09C macro`
/u-boot/drivers/clk/meson/
A D	g12a.c	`871 regmap_write(priv->map, HHI_PCIE_PLL_CNTL1, 0x00000000); in meson_pcie_pll_set_rate()`

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