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Searched refs:K210_SYSCTL_SEL0 (Results 1 – 2 of 2) sorted by relevance

/u-boot/include/dt-bindings/mfd/
A Dk210-sysctl.h17 #define K210_SYSCTL_SEL0 0x20 /* Clock select controller 0 */ macro
/u-boot/drivers/clk/kendryte/
A Dclk.c102 DIV_FLAGS(K210_CLK_ACLK, K210_SYSCTL_SEL0, 1, 2, \
104 DIV(K210_CLK_APB0, K210_SYSCTL_SEL0, 3, 3) \
105 DIV(K210_CLK_APB1, K210_SYSCTL_SEL0, 6, 3) \
106 DIV(K210_CLK_APB2, K210_SYSCTL_SEL0, 9, 3) \
229 MUX_PARENTS(K210_CLK_ACLK, aclk_sels, K210_SYSCTL_SEL0, 0, 1) \
230 MUX(K210_CLK_SPI3, K210_SYSCTL_SEL0, 12, 1) \
231 MUX(K210_CLK_TIMER0, K210_SYSCTL_SEL0, 13, 1) \
232 MUX(K210_CLK_TIMER1, K210_SYSCTL_SEL0, 14, 1) \
233 MUX(K210_CLK_TIMER2, K210_SYSCTL_SEL0, 15, 1)

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