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Searched refs:L2CSR0_L2E (Results 1 – 11 of 11) sorted by relevance

/u-boot/arch/powerpc/cpu/mpc85xx/
A Dcpu_init.c573 out_be32(&l2cache->l2csr0, L2CSR0_L2E|L2CSR0_L2PE|L2CSR0_L2REP_MODE); in enable_cluster_l2()
700 if (CONFIG_SYS_INIT_L2CSR0 & L2CSR0_L2E) { in l2cache_init()
701 while (!(mfspr(SPRN_L2CSR0) & L2CSR0_L2E)) in l2cache_init()
708 if (l2cache->l2csr0 & L2CSR0_L2E) in l2cache_init()
A Dstart.S135 lis r2, L2CSR0_L2E@h
136 ori r2, r2, L2CSR0_L2E@l
155 lis r2, L2CSR0_L2E@h
156 ori r2, r2, L2CSR0_L2E@l
710 lis r4, (L2CSR0_L2E|L2CSR0_L2PE)@h
A Drelease.S285 andis. r1,r3,L2CSR0_L2E@h
/u-boot/include/configs/
A Dkmp204x.h62 #define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E
A Dcyrus.h60 #define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E
A DP2041RDB.h65 #define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E
A Dcorenet_ds.h74 #define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E
A Dkmcent2.h157 #define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E
A DT102xRDB.h148 #define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E
A DT104xRDB.h174 #define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E
/u-boot/arch/powerpc/include/asm/
A Dprocessor.h501 #define L2CSR0_L2E 0x80000000 /* L2 Cache Enable */ macro

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