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Searched refs:PHY (Results 1 – 25 of 162) sorted by relevance

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/u-boot/drivers/phy/
A DKconfig2 menu "PHY Subsystem"
4 config PHY config
5 bool "PHY Core"
8 PHY support.
16 PHY, power on/off the PHY, and reset the PHY. It's meant to be as
32 PHY, power on/off the PHY, and reset the PHY. It's meant to be as
39 depends on PHY
46 depends on PHY
48 Support for a no-op PHY driver (stubbed PHY driver).
94 depends on PHY
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/u-boot/drivers/phy/rockchip/
A DKconfig5 menu "Rockchip PHY driver"
10 select PHY
15 bool "Rockchip PCIe PHY Driver"
17 select PHY
19 Enable this to support the Rockchip PCIe PHY.
22 bool "Rockchip Snps PCIe3 PHY Driver"
23 depends on PHY && ARCH_ROCKCHIP
25 Support for Rockchip PCIe3 PHY with Synopsys IP block.
31 bool "Rockchip TYPEC PHY Driver"
33 select PHY
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/u-boot/doc/device-tree-bindings/phy/
A Dphy-stm32-usbphyc.txt1 STMicroelectronics STM32 USB HS PHY controller
3 The STM32 USBPHYC block contains a dual port High Speed UTMI+ PHY and a UTMI
4 switch. It controls PHY configuration and status, and the UTMI+ switch that
5 selects either OTG or HOST controller for the second PHY port. It also sets
11 |_ PHY port#1 _________________ HOST controller
14 |_ PHY port#2 ----| |________________
26 - vdda1v1-supply: phandle to the regulator providing 1V1 power to the PHY
27 - vdda1v8-supply: phandle to the regulator providing 1V8 power to the PHY
43 - phy-supply: phandle to the regulator providing 3V3 power to the PHY,
45 - #phy-cells: see phy-bindings.txt in the same directory, must be <0> for PHY
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A Dno-op.txt1 NOP PHY driver
3 This driver is used to stub PHY operations in a driver (USB, SATA).
4 This is useful when the 'client' driver (USB, SATA, ...) uses the PHY framework
5 and there is no actual PHY harwdare to drive.
A Dphy-stih407-usb.txt1 ST STiH407 USB PHY controller
3 This file documents the dt bindings for the usb picoPHY driver which is the PHY for both USB2 and U…
/u-boot/board/keymile/km_arm/
A Dkm_arm.c338 { PHY(0), PHY_PAGE, AN1000FIX_PAGE },
339 { PHY(0), PHY_STATUS, AN1000FIX },
340 { PHY(0), PHY_PAGE, 0 },
344 { PHY(0), PHY_1000_CTRL, NO_ADV },
345 { PHY(0), PHY_SPEC_CTRL, AUTO_MDIX_EN },
350 { PHY(1), PHY_CTRL, PHY_PWR_DOWN },
351 { PHY(1), PHY_SPEC_CTRL, SPEC_PWR_DOWN },
354 { PHY(2), PHY_CTRL, PHY_PWR_DOWN },
355 { PHY(2), PHY_SPEC_CTRL, SPEC_PWR_DOWN },
358 { PHY(3), PHY_CTRL, PHY_PWR_DOWN },
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/u-boot/drivers/usb/dwc3/
A DKconfig36 imply PHY
44 imply PHY
56 menu "PHY Subsystem"
59 bool "TI OMAP SoC series USB DRD PHY driver"
61 Enable single driver for both USB2 PHY programming and USB3 PHY
65 bool "Exynos5 SoC series USB DRD PHY driver"
67 Enable USB DRD PHY support for Exynos 5 SoC series.
68 This driver provides PHY interface for USB 3.0 DRD controller
/u-boot/drivers/net/phy/
A DKconfig9 bool "Ethernet PHY (physical media interface) support"
24 int "PHY address"
44 hex "Bitmask of PHY ports"
57 hex "Bitmask of PHY Ports"
65 bool "Generic 10G PHY support"
148 bool "LXT971 Ethernet PHY support"
183 PHY during initialization.
259 for proper PHY operations) for the PHY module present on ACTION SEMI S700
285 the PHY name is associated with a PHY ID.
301 bool "Fixed-Link PHY"
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/u-boot/drivers/usb/phy/
A DKconfig9 bool "TWL4030 PHY"
12 bool "OMAP PHY"
15 bool "Rockchip USB2 PHY"
/u-boot/doc/device-tree-bindings/net/
A Dphy.txt1 PHY nodes
4 node for each PHY. Parent node for such a PHY node is expected to correspond to
5 a MDIO bus and the bus is used to access the PHY.
A Daquantia-phy.txt1 PHY nodes for Aquantia devices.
3 This text describes properties that are applicable to Aquantia PHY nodes in
9 corresponding to these is driven by the PHY firmware with the downside that
10 a custom firmware is needed for each integration of a PHY.
12 be driven by the PHY driver and reduce dependency on specific FW versions.
A Dethernet.txt4 generic PHY 'phys' property, see
19 - phy-mode: string, operation mode of the PHY interface. This is now a de-facto
30 * "rgmii-id" (RGMII with internal RX and TX delays provided by the PHY, the
32 * "rgmii-rxid" (RGMII with internal RX delay provided by the PHY, the MAC
34 * "rgmii-txid" (RGMII with internal TX delay provided by the PHY, the MAC
47 - phy-handle: phandle, specifies a reference to a node representing a PHY
59 - managed: string, specifies the PHY management type. Supported values are:
63 Child nodes of the Ethernet controller are typically the individual PHY devices
66 For non-MDIO PHY management see fixed-link.txt.
A Dfsl-tsec-phy.txt21 Child nodes of the TSEC controller are typically the individual PHY devices
26 The MDIO is a bus to which the PHY devices are connected. For each
27 device that exists on this bus, a PHY node should be created.
47 As of this writing, every tsec is associated with an internal TBI PHY.
48 This PHY is accessed through the local MDIO bus. These buses are defined
/u-boot/drivers/phy/allwinner/
A DKconfig5 bool "Allwinner Sun4I USB PHY driver"
7 select PHY
12 This driver controls the entire USB PHY block, both the USB OTG
/u-boot/drivers/usb/ulpi/
A DKconfig9 UTMI (USB PHY) via ULPI interface.
28 Select to commnicate with USB PHY via ULPI interface.
30 PHY Transreceiver for USB controllers.
/u-boot/arch/arm/mach-uniphier/
A DKconfig102 bool "Enable dump command of DDR PHY parameters"
107 The command "ddrphy" shows the resulting parameters of DDR PHY
108 training; it is useful for the evaluation of DDR PHY training.
111 bool "Enable dump command of DDR Multi PHY parameters"
115 The command "ddrmphy" shows the resulting parameters of DDR Multi PHY
116 training; it is useful for the evaluation of DDR Multi PHY training.
/u-boot/arch/arm/dts/
A Dfsl-lx2160a-rdb.dts51 /* AR8035 PHY - "compatible" property not strictly needed */
57 /* AR8035 PHY - "compatible" property not strictly needed */
63 /* AQR107 PHY - "compatible" property not strictly needed */
69 /* AQR107 PHY - "compatible" property not strictly needed */
/u-boot/arch/arm/cpu/armv7/ls102xa/
A DKconfig65 Workaround for USB PHY erratum A008997
70 Workaround for USB PHY erratum A009007
75 Workaround for USB PHY erratum A009008
80 Workaround for USB PHY erratum A009798
/u-boot/doc/device-tree-bindings/net/phy/
A Datheros.txt1 * Qualcomm Atheros PHY Device Tree binding
4 - reg: PHY address
/u-boot/board/freescale/ls1043ardb/
A Dls1043ardb_pbi.cfg9 #USB PHY frequency sel
/u-boot/board/freescale/ls1043aqds/
A Dls1043aqds_pbi.cfg9 #USB PHY frequency sel
/u-boot/board/freescale/ls1046aqds/
A Dls1046aqds_pbi.cfg9 #USB PHY frequency sel
/u-boot/board/freescale/ls1046ardb/
A Dls1046ardb_pbi.cfg7 #USB PHY frequency sel
/u-boot/arch/mips/mach-mtmips/mt7620/
A DKconfig15 FE PHYs,one port can be configured to use either FE PHY or GE PHY),
/u-boot/board/toradex/colibri_imx7/
A DKconfig32 bool "External oscillator for Ethernet PHY clock provided"
34 Select this if your module provides a external Ethernet PHY

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