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Searched refs:RCC_AHB1ENR (Results 1 – 2 of 2) sorted by relevance

/u-boot/drivers/clk/
A Dclk_stm32h7.c217 {RCC_AHB1ENR, 28, "usb2ulpi"},
218 {RCC_AHB1ENR, 17, "eth1rx"},
219 {RCC_AHB1ENR, 16, "eth1tx"},
220 {RCC_AHB1ENR, 15, "eth1mac"},
221 {RCC_AHB1ENR, 14, "art"},
223 {RCC_AHB1ENR, 1, "dma2"},
224 {RCC_AHB1ENR, 0, "dma1"},
274 {RCC_AHB1ENR, 27, "usb2otg"},
275 {RCC_AHB1ENR, 25, "usb1otg"},
276 {RCC_AHB1ENR, 5, "adc12"},
[all …]
/u-boot/doc/device-tree-bindings/clock/
A Dst,stm32-rcc.txt36 from the first RCC clock enable register (RCC_AHB1ENR, address offset 0x30).

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