Searched refs:SCLK (Results 1 – 6 of 6) sorted by relevance
/u-boot/board/renesas/stout/ |
A D | cpld.c | 17 #define SCLK (92 + 24) macro 36 gpio_set_value(SCLK, 1); in cpld_read() 38 gpio_set_value(SCLK, 0); in cpld_read() 43 gpio_set_value(SCLK, 1); in cpld_read() 44 gpio_set_value(SCLK, 0); in cpld_read() 48 gpio_set_value(SCLK, 1); in cpld_read() 51 gpio_set_value(SCLK, 0); in cpld_read() 63 gpio_set_value(SCLK, 1); in cpld_write() 65 gpio_set_value(SCLK, 0); in cpld_write() 77 gpio_set_value(SCLK, 1); in cpld_write() [all …]
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/u-boot/drivers/rtc/ |
A D | ds1302.c | 15 #define SCLK 0x400 macro 19 #define RESET rtc_go_low(RST), rtc_go_low(SCLK) 20 #define N_RESET rtc_go_high(RST), rtc_go_low(SCLK) 22 #define CLOCK_HIGH rtc_go_high(SCLK) 23 #define CLOCK_LOW rtc_go_low(SCLK) 199 rtc_go_output(DATA|SCLK|RST); in rtc_init()
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/u-boot/include/ |
A D | sym53c8xx.h | 187 #define SCLK 0x80 /* Use the PCI clock as SCSI clock */ macro
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/u-boot/arch/arm/dts/ |
A D | armada-385-turris-omnia.dts | 377 /* MISO, MOSI, SCLK and CS1 are routed to pin header CN11 */
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/u-boot/drivers/video/ |
A D | Kconfig | 491 string "SPI SCLK pin for LCD related config job"
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/u-boot/ |
A D | README | 1700 the i2c SCLK line directly, either by using the
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