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Searched refs:STM32H7_APB1L_RESET (Results 1 – 3 of 3) sorted by relevance

/u-boot/include/dt-bindings/mfd/
A Dstm32h7-rcc.h92 #define STM32H7_APB1L_RESET(bit) (STM32H7_RCC_APB1L_##bit + (0x90 * 8)) macro
/u-boot/arch/arm/dts/
A Dstm32h743.dtsi77 resets = <&rcc STM32H7_APB1L_RESET(SPI2)>;
89 resets = <&rcc STM32H7_APB1L_RESET(SPI3)>;
109 resets = <&rcc STM32H7_APB1L_RESET(I2C1)>;
121 resets = <&rcc STM32H7_APB1L_RESET(I2C2)>;
133 resets = <&rcc STM32H7_APB1L_RESET(I2C3)>;
/u-boot/doc/device-tree-bindings/clock/
A Dst,stm32h7-rcc.txt151 resets = <&rcc STM32H7_APB1L_RESET(TIM2)>;

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