Home
last modified time | relevance | path

Searched refs:Tln (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/arm/include/asm/arch-pxa/
A Dpxa-regs.h2162 #define LCCR2_VrtSnchWdth(Tln) /* Vertical Synchronization pulse */ \ argument
2164 (((Tln) - 1) << FShft (LCCR2_VSW))
2168 #define LCCR2_EndFrmDel(Tln) /* End-of-Frame Delay */ \ argument
2170 ((Tln) << FShft (LCCR2_EFW))
2174 #define LCCR2_BegFrmDel(Tln) /* Beginning-of-Frame Delay */ \ argument
2176 ((Tln) << FShft (LCCR2_BFW))
/u-boot/include/
A DSA-1100.h2767 #define LCCR2_VrtSnchWdth(Tln) /* Vertical Synchronization pulse */ \ argument
2769 (((Tln) - 1) << FShft (LCCR2_VSW))
2772 #define LCCR2_EndFrmDel(Tln) /* End-of-Frame Delay */ \ argument
2774 ((Tln) << FShft (LCCR2_EFW))
2777 #define LCCR2_BegFrmDel(Tln) /* Beginning-of-Frame Delay */ \ argument
2779 ((Tln) << FShft (LCCR2_BFW))

Completed in 22 milliseconds