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Searched refs:clk_rcg_set_rate_mnd (Results 1 – 4 of 4) sorted by relevance

/u-boot/arch/arm/mach-snapdragon/
A Dclock-apq8096.c48 clk_rcg_set_rate_mnd(priv->base, &sdc_regs, div, 0, 0, in clk_init_sdc()
70 clk_rcg_set_rate_mnd(priv->base, &uart2_regs, 1, 192, 15625, in clk_init_uart()
A Dclock-apq8016.c61 clk_rcg_set_rate_mnd(priv->base, &sdc_regs[slot], div, 0, 0, in clk_init_sdc()
84 clk_rcg_set_rate_mnd(priv->base, &uart2_regs, 1, 144, 15625, in clk_init_uart()
A Dclock-snapdragon.h42 void clk_rcg_set_rate_mnd(phys_addr_t base, const struct bcr_regs *regs,
A Dclock-snapdragon.c78 void clk_rcg_set_rate_mnd(phys_addr_t base, const struct bcr_regs *regs, in clk_rcg_set_rate_mnd() function

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