cm_clkmode_dpll_core (reference) in projects: u-boot

Searched refs:cm_clkmode_dpll_core (Results 1 – 5 of 5) sorted by relevance

/u-boot/arch/arm/mach-omap2/omap5/
A D	prcm-regs.c	`20 .cm_clkmode_dpll_core = 0x4a004120, 476 .cm_clkmode_dpll_core = 0x4a004120, 771 .cm_clkmode_dpll_core = 0x4a005120,`
/u-boot/arch/arm/mach-omap2/omap4/
A D	prcm-regs.c	`19 .cm_clkmode_dpll_core = 0x4a004120,`
/u-boot/arch/arm/mach-omap2/
A D	clocks-common.c	`393 do_setup_dpll((prcm)->cm_clkmode_dpll_core, params, in setup_dplls() 396 do_setup_dpll((prcm)->cm_clkmode_dpll_core, params, in setup_dplls()`
A D	emif-common.c	`1540 bypass_dpll((*prcm)->cm_clkmode_dpll_core); in sdram_init()`
/u-boot/arch/arm/include/asm/
A D	omap_common.h	`24 u32 cm_clkmode_dpll_core; member`

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