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/u-boot/doc/device-tree-bindings/misc/
A Dintel,baytrail-fsp.txt14 - fsp,enable-sdio
18 - fsp,enable-spi
19 - fsp,enable-sata
21 - fsp,enable-xhci
22 - fsp,enable-dma0
23 - fsp,enable-dma1
31 - fsp,enable-pwm0
32 - fsp,enable-pwm1
33 - fsp,enable-hsi
35 - fsp,isp-enable
[all …]
/u-boot/arch/arm/mach-exynos/
A Dpower.c12 unsigned int enable) in exynos4_mipi_phy_control() argument
25 if (enable) in exynos4_mipi_phy_control()
44 if (enable) { in exynos5_set_usbhost_phy_ctrl()
60 if (enable) { in exynos4412_set_usbhost_phy_ctrl()
82 exynos5_set_usbhost_phy_ctrl(enable); in set_usbhost_phy_ctrl()
93 if (enable) { in exynos5_set_usbdrd_phy_ctrl()
109 if (enable) { in exynos5420_set_usbdev_phy_ctrl()
128 exynos5420_set_usbdev_phy_ctrl(enable); in set_usbdrd_phy_ctrl()
130 exynos5_set_usbdrd_phy_ctrl(enable); in set_usbdrd_phy_ctrl()
141 if (enable) in exynos5_dp_phy_control()
[all …]
/u-boot/arch/arm/dts/
A Dtegra124-nyan-big.dts82 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
89 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
96 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
103 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
110 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
117 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
131 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
152 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
159 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
166 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
[all …]
A Dthunderx-88xx.dtsi28 enable-method = "psci";
34 enable-method = "psci";
40 enable-method = "psci";
46 enable-method = "psci";
52 enable-method = "psci";
58 enable-method = "psci";
64 enable-method = "psci";
70 enable-method = "psci";
76 enable-method = "psci";
82 enable-method = "psci";
[all …]
A Dtegra124-apalis.dts131 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
138 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
145 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
195 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
202 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
209 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
238 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1805 ams,enable-tracking;
2097 enable-active-high;
2123 enable-active-high;
[all …]
A Darmada-385-atl-x530.dts16 usb-enable {
17 compatible = "atl,usb-enable";
18 enable-gpio = <&gpio0 19 GPIO_ACTIVE_HIGH>;
33 led-enable {
34 compatible = "atl,led-enable";
35 enable-gpio = <&gpio1 17 GPIO_ACTIVE_HIGH>;
A Darmada-385-atl-x530DP.dts17 usb-enable {
18 compatible = "atl,usb-enable";
19 enable-gpio = <&gpio0 19 GPIO_ACTIVE_HIGH>;
34 led-enable {
35 compatible = "atl,led-enable";
36 enable-gpio = <&gpio1 17 GPIO_ACTIVE_HIGH>;
/u-boot/arch/arm/include/asm/arch-mx6/
A Dclock.h65 void hab_caam_clock_enable(unsigned char enable);
66 void enable_ocotp_clk(unsigned char enable);
67 void enable_usboh3_clk(unsigned char enable);
68 void enable_uart_clk(unsigned char enable);
69 int enable_usdhc_clk(unsigned char enable, unsigned bus_num);
73 int enable_i2c_clk(unsigned char enable, unsigned i2c_num);
74 int enable_spi_clk(unsigned char enable, unsigned spi_num);
78 void enable_enet_clk(unsigned char enable);
79 int enable_lcdif_clock(u32 base_addr, bool enable);
84 void enable_eim_clk(unsigned char enable);
/u-boot/test/dm/
A Dpanel.c27 bool enable; in dm_test_panel() local
35 &enable, &polarity)); in dm_test_panel()
36 ut_asserteq(false, enable); in dm_test_panel()
41 &enable, &polarity)); in dm_test_panel()
44 ut_asserteq(true, enable); in dm_test_panel()
51 &enable, &polarity)); in dm_test_panel()
56 &enable, &polarity)); in dm_test_panel()
61 &enable, &polarity)); in dm_test_panel()
67 &enable, &polarity)); in dm_test_panel()
68 ut_asserteq(true, enable); in dm_test_panel()
[all …]
/u-boot/arch/arm/include/asm/arch-mx5/
A Dclock.h47 void enable_usb_phy1_clk(bool enable);
48 void enable_usb_phy2_clk(bool enable);
50 void enable_usboh3_clk(bool enable);
52 int enable_i2c_clk(unsigned char enable, unsigned i2c_num);
53 void enable_nfc_clk(unsigned char enable);
54 void enable_efuse_prog_supply(bool enable);
/u-boot/arch/xtensa/
A DKconfig20 bool "Do not enable icache"
23 Do not enable instruction cache in U-Boot.
26 bool "Do not enable icache in SPL"
30 Do not enable instruction cache in SPL.
33 bool "Do not enable dcache"
36 Do not enable data cache in U-Boot.
39 bool "Do not enable dcache in SPL"
43 Do not enable data cache in SPL.
/u-boot/arch/nds32/
A DKconfig20 bool "Do not enable icache"
23 Do not enable instruction cache in U-Boot.
26 bool "Do not enable icache in SPL"
30 Do not enable instruction cache in SPL.
33 bool "Do not enable dcache"
36 Do not enable data cache in U-Boot.
39 bool "Do not enable dcache in SPL"
43 Do not enable data cache in SPL.
/u-boot/drivers/power/regulator/
A Dlp873x_regulator.c40 *enable = true; in lp873x_buck_enable()
42 *enable = false; in lp873x_buck_enable()
46 if (*enable) in lp873x_buck_enable()
142 *enable = true; in lp873x_ldo_enable()
144 *enable = false; in lp873x_ldo_enable()
148 if (*enable) in lp873x_ldo_enable()
258 bool enable = false; in ldo_get_enable() local
261 ret = lp873x_ldo_enable(dev, PMIC_OP_GET, &enable); in ldo_get_enable()
265 return enable; in ldo_get_enable()
312 bool enable = false; in buck_get_enable() local
[all …]
A Dregulator_common.c62 struct regulator_common_plat *dev_pdata, bool enable) in regulator_common_set_enable() argument
67 dev->name, enable, dev_pdata->startup_delay_us, in regulator_common_set_enable()
71 if (!enable) in regulator_common_set_enable()
76 ret = dm_gpio_set_value(&dev_pdata->gpio, enable); in regulator_common_set_enable()
79 enable); in regulator_common_set_enable()
83 if (enable && dev_pdata->startup_delay_us) in regulator_common_set_enable()
87 if (!enable && dev_pdata->off_on_delay_us) in regulator_common_set_enable()
A Dtps65941_regulator.c46 *enable = true; in tps65941_buck_enable()
48 *enable = false; in tps65941_buck_enable()
52 if (*enable) in tps65941_buck_enable()
198 *enable = true; in tps65941_ldo_enable()
200 *enable = false; in tps65941_ldo_enable()
204 if (*enable) in tps65941_ldo_enable()
334 bool enable = false; in ldo_get_enable() local
337 ret = tps65941_ldo_enable(dev, PMIC_OP_GET, &enable); in ldo_get_enable()
341 return enable; in ldo_get_enable()
368 bool enable = false; in buck_get_enable() local
[all …]
A Dgpio-regulator.c84 int enable; in gpio_regulator_get_value() local
95 enable = dm_gpio_get_value(&dev_pdata->gpio); in gpio_regulator_get_value()
96 if (enable == dev_pdata->states[0]) in gpio_regulator_get_value()
106 bool enable; in gpio_regulator_set_value() local
112 enable = dev_pdata->states[0]; in gpio_regulator_set_value()
114 enable = dev_pdata->states[1]; in gpio_regulator_set_value()
118 ret = dm_gpio_set_value(&dev_pdata->gpio, enable); in gpio_regulator_set_value()
121 enable); in gpio_regulator_set_value()
134 static int gpio_regulator_set_enable(struct udevice *dev, bool enable) in gpio_regulator_set_enable() argument
137 return regulator_common_set_enable(dev, &dev_pdata->common, enable); in gpio_regulator_set_enable()
A Dlp87565_regulator.c22 static int lp87565_buck_enable(struct udevice *dev, int op, bool *enable) in lp87565_buck_enable() argument
39 *enable = true; in lp87565_buck_enable()
41 *enable = false; in lp87565_buck_enable()
45 if (*enable) in lp87565_buck_enable()
169 bool enable = false; in buck_get_enable() local
173 ret = lp87565_buck_enable(dev, PMIC_OP_GET, &enable); in buck_get_enable()
177 return enable; in buck_get_enable()
180 static int buck_set_enable(struct udevice *dev, bool enable) in buck_set_enable() argument
182 return lp87565_buck_enable(dev, PMIC_OP_SET, &enable); in buck_set_enable()
A Dpalmas_regulator.c67 *enable = true; in palmas_smps_enable()
69 *enable = false; in palmas_smps_enable()
73 if (*enable) in palmas_smps_enable()
212 *enable = true; in palmas_ldo_enable()
214 *enable = false; in palmas_ldo_enable()
218 if (*enable) in palmas_ldo_enable()
342 bool enable = false; in ldo_get_enable() local
345 ret = palmas_ldo_enable(dev, PMIC_OP_GET, &enable); in ldo_get_enable()
349 return enable; in ldo_get_enable()
449 bool enable = false; in smps_get_enable() local
[all …]
/u-boot/drivers/ddr/altera/
A Dsdram_arria10.c474 SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS_OFFSET(enable),
481 SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS_OFFSET(enable),
499 SOCFPGA_SDR_FIREWALL_L3_ADDRESS_OFFSET(enable),
505 SOCFPGA_SDR_FIREWALL_L3_ADDRESS_OFFSET(enable),
511 SOCFPGA_SDR_FIREWALL_L3_ADDRESS_OFFSET(enable),
517 SOCFPGA_SDR_FIREWALL_L3_ADDRESS_OFFSET(enable),
523 SOCFPGA_SDR_FIREWALL_L3_ADDRESS_OFFSET(enable),
529 SOCFPGA_SDR_FIREWALL_L3_ADDRESS_OFFSET(enable),
535 SOCFPGA_SDR_FIREWALL_L3_ADDRESS_OFFSET(enable),
541 SOCFPGA_SDR_FIREWALL_L3_ADDRESS_OFFSET(enable),
[all …]
/u-boot/drivers/video/exynos/
A Dexynos_mipi_dsi_lowlevel.h42 unsigned int lane, unsigned int enable);
44 unsigned int enable, unsigned int afc_code);
46 unsigned int enable);
55 unsigned int enable);
59 unsigned int enable);
61 unsigned int enable, unsigned int prs_val);
63 unsigned int lane_sel, unsigned int enable);
65 unsigned int enable);
78 unsigned int enable);
/u-boot/arch/arm/mach-stm32mp/
A Dpwr_regulator.c29 u32 enable; member
114 .enable = STM32MP_PWR_CR3_REG11DEN,
120 .enable = STM32MP_PWR_CR3_REG18DEN,
126 .enable = STM32MP_PWR_CR3_USB33DEN,
220 return (reg & p->enable) != 0; in stm32mp_pwr_regulator_get_enable()
230 dev_dbg(dev, "Turning %s %s\n", enable ? "on" : "off", p->name); in stm32mp_pwr_regulator_set_enable()
237 if (!!(reg & p->enable) == enable) in stm32mp_pwr_regulator_set_enable()
240 reg &= ~p->enable; in stm32mp_pwr_regulator_set_enable()
241 if (enable) in stm32mp_pwr_regulator_set_enable()
242 reg |= p->enable; in stm32mp_pwr_regulator_set_enable()
[all …]
/u-boot/drivers/video/imx/
A Dmxcfb.h24 int enable; member
29 int enable; member
36 int enable; member
46 int enable; member
/u-boot/arch/arm/include/asm/arch-mx7ulp/
A Dclock.h29 int enable_i2c_clk(unsigned char enable, unsigned i2c_num);
33 void enable_ocotp_clk(unsigned char enable);
36 void enable_usboh3_clk(unsigned char enable);
40 void hab_caam_clock_enable(unsigned char enable);
/u-boot/board/bosch/shc/
A DKconfig16 prompt "enable different boot versions for the shc board"
22 bool "enable eMMC"
24 enable here the eMMC functionality on the bosch shc board.
27 bool "enable ICT"
29 enable here the ICT functionality on the bosch shc board
32 bool "enable NETBOOT"
34 enable here the NETBOOT functionality on the bosch shc board
37 bool "enable SDBOOT"
39 enable here the SDBOOT functionality on the bosch shc board
44 prompt "enable different board versions for the shc board"
/u-boot/arch/arm/mach-socfpga/
A Dtimer_s10.c18 int enable = 0x3; /* timer enable + output signal masked */ in timer_init() local
22 writel(enable, SOCFPGA_GTIMER_SEC_ADDRESS); in timer_init()
24 asm volatile("msr cntp_ctl_el0, %0" : : "r" (enable)); in timer_init()

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