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Searched refs:gpr (Results 1 – 25 of 97) sorted by relevance

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/u-boot/board/freescale/imx8mp_evk/
A Dimx8mp_evk.c50 struct iomuxc_gpr_base_regs *gpr = in setup_fec() local
54 setbits_le32(&gpr->gpr[1], BIT(22)); in setup_fec()
76 struct iomuxc_gpr_base_regs *gpr = in setup_eqos() local
82 clrsetbits_le32(&gpr->gpr[1], in setup_eqos()
84 setbits_le32(&gpr->gpr[1], BIT(19) | BIT(21)); in setup_eqos()
/u-boot/board/phytec/phycore_imx8mm/
A Dphycore-imx8mm.c19 struct iomuxc_gpr_base_regs *gpr = in setup_fec() local
23 clrsetbits_le32(&gpr->gpr[1], 0x2000, 0); in setup_fec()
/u-boot/arch/powerpc/cpu/mpc8xx/
A Dtraps.c72 printf("%08lX ", regs->gpr[i]); in show_regs()
82 print_backtrace((unsigned long *)regs->gpr[1]); in _exception()
120 print_backtrace((unsigned long *)regs->gpr[1]); in MachineCheckException()
127 print_backtrace((unsigned long *)regs->gpr[1]); in AlignmentException()
134 print_backtrace((unsigned long *)regs->gpr[1]); in ProgramCheckException()
141 print_backtrace((unsigned long *)regs->gpr[1]); in SoftEmuException()
/u-boot/board/beacon/imx8mn/
A Dimx8mn_beacon.c20 struct iomuxc_gpr_base_regs *gpr = in setup_fec() local
24 clrsetbits_le32(&gpr->gpr[1], 0x2000, 0); in setup_fec()
/u-boot/board/beacon/imx8mm/
A Dimx8mm_beacon.c20 struct iomuxc_gpr_base_regs *gpr = in setup_fec() local
24 clrsetbits_le32(&gpr->gpr[1], 0x2000, 0); in setup_fec()
/u-boot/arch/powerpc/cpu/mpc83xx/
A Dtraps.c71 printf("%08lX ", regs->gpr[i]); in show_regs()
82 print_backtrace((unsigned long *)regs->gpr[1]); in _exception()
155 print_backtrace((unsigned long *)regs->gpr[1]); in MachineCheckException()
169 print_backtrace((unsigned long *)regs->gpr[1]); in AlignmentException()
180 print_backtrace((unsigned long *)regs->gpr[1]); in ProgramCheckException()
191 print_backtrace((unsigned long *)regs->gpr[1]); in SoftEmuException()
/u-boot/arch/powerpc/cpu/mpc86xx/
A Dtraps.c81 printf("%08lX ", regs->gpr[i]); in show_regs()
92 print_backtrace((unsigned long *)regs->gpr[1]); in _exception()
138 print_backtrace((unsigned long *)regs->gpr[1]); in MachineCheckException()
149 print_backtrace((unsigned long *)regs->gpr[1]); in AlignmentException()
174 print_backtrace((unsigned long *)regs->gpr[1]); in ProgramCheckException()
185 print_backtrace((unsigned long *)regs->gpr[1]); in SoftEmuException()
/u-boot/board/freescale/imx8mm_evk/
A Dimx8mm_evk.c22 struct iomuxc_gpr_base_regs *gpr = in setup_fec() local
26 clrsetbits_le32(&gpr->gpr[1], 0x2000, 0); in setup_fec()
/u-boot/drivers/pci/
A Dpcie_imx.c461 setbits_le32(&iomuxc_regs->gpr[5], IOMUXC_GPR5_PCIE_BTNRST); in imx6_pcie_assert_core_reset()
479 gpr1 = readl(&iomuxc_regs->gpr[1]); in imx6_pcie_assert_core_reset()
480 gpr12 = readl(&iomuxc_regs->gpr[12]); in imx6_pcie_assert_core_reset()
492 writel(val, &iomuxc_regs->gpr[12]); in imx6_pcie_assert_core_reset()
496 clrbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_REF_SSP_EN); in imx6_pcie_assert_core_reset()
508 clrsetbits_le32(&iomuxc_regs->gpr[12], in imx6_pcie_init_phy()
511 clrsetbits_le32(&iomuxc_regs->gpr[12], in imx6_pcie_init_phy()
516 clrsetbits_le32(&iomuxc_regs->gpr[12], in imx6_pcie_init_phy()
526 &iomuxc_regs->gpr[8]); in imx6_pcie_init_phy()
608 clrbits_le32(&iomuxc_regs->gpr[5], IOMUXC_GPR5_PCIE_BTNRST); in imx6_pcie_deassert_core_reset()
[all …]
/u-boot/board/google/imx8mq_phanbell/
A Dimx8mq_phanbell.c55 struct iomuxc_gpr_base_regs *gpr = in setup_fec() local
59 clrsetbits_le32(&gpr->gpr[1], BIT(13) | BIT(17), 0); in setup_fec()
/u-boot/board/freescale/imx8mq_evk/
A Dimx8mq_evk.c60 struct iomuxc_gpr_base_regs *gpr = in setup_fec() local
64 clrsetbits_le32(&gpr->gpr[1], BIT(13) | BIT(17), 0); in setup_fec()
/u-boot/arch/powerpc/cpu/mpc85xx/
A Dtraps.c110 printf("%08lX ", regs->gpr[i]); in show_regs()
122 print_backtrace((unsigned long *)regs->gpr[1]); in _exception()
191 print_backtrace((unsigned long *)regs->gpr[1]); in MachineCheckException()
213 print_backtrace((unsigned long *)regs->gpr[1]); in AlignmentException()
236 print_backtrace((unsigned long *)regs->gpr[1]); in ProgramCheckException()
281 print_backtrace((unsigned long *)regs->gpr[1]); in ExtIntException()
/u-boot/board/gateworks/venice/
A Dimx8mm_venice.c59 struct iomuxc_gpr_base_regs *gpr = in setup_fec() local
63 clrsetbits_le32(&gpr->gpr[1], 0x2000, 0); in setup_fec()
/u-boot/arch/microblaze/include/asm/
A Dptrace.h68 microblaze_reg_t gpr[NUM_GPRS]; member
85 #define PT_REGS_SYSCALL(regs) (regs)->gpr[0]
86 #define PT_REGS_SET_SYSCALL(regs, val) ((regs)->gpr[0] = (val))
/u-boot/board/technexion/pico-imx8mq/
A Dpico-imx8mq.c101 struct iomuxc_gpr_base_regs *gpr = in setup_fec() local
107 clrsetbits_le32(&gpr->gpr[1], BIT(13) | BIT(17), 0); in setup_fec()
/u-boot/board/toradex/verdin-imx8mm/
A Dverdin-imx8mm.c31 struct iomuxc_gpr_base_regs *gpr = in setup_fec() local
35 clrsetbits_le32(&gpr->gpr[1], 0x2000, 0); in setup_fec()
/u-boot/arch/powerpc/lib/
A Dkgdb.c103 kdp->regs[1].val = regs->gpr[SP_REGNUM]; in kgdb_enter()
163 *ptr++ = regs->gpr[i]; in kgdb_getregs()
203 regs->gpr[regno] = *ptr; in kgdb_putreg()
236 regs->gpr[i] = *ptr++; in kgdb_putregs()
/u-boot/board/freescale/mx6ullevk/
A Dmx6ullevk.c76 clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC1_MASK, in setup_fec()
83 clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC2_MASK, in setup_fec()
/u-boot/board/aristainetos/
A Daristainetos.c190 writel(reg, &iomux->gpr[2]); in enable_lvds()
192 reg = readl(&iomux->gpr[3]); in enable_lvds()
196 writel(reg, &iomux->gpr[3]); in enable_lvds()
212 &iomuxc_regs->gpr[1]); in set_gpr_register()
213 writel(0x0, &iomuxc_regs->gpr[8]); in set_gpr_register()
216 &iomuxc_regs->gpr[12]); in set_gpr_register()
486 clrsetbits_le32(&iomux->gpr[1], IOMUXC_GPR1_USB_OTG_ID_SEL_MASK, 0); in board_init()
/u-boot/arch/arm/mach-imx/
A Dcache.c104 val = readl(&iomux->gpr[11]); in v7_outer_cache_enable()
108 writel(val, &iomux->gpr[11]); in v7_outer_cache_enable()
A Dsata.c25 clrsetbits_le32(&iomuxc_regs->gpr[13], in setup_sata()
/u-boot/board/technexion/pico-imx6/
A Dpico-imx6.c149 u32 reg = readl(&iomux->gpr[2]); in enable_lvds()
151 writel(reg, &iomux->gpr[2]); in enable_lvds()
284 writel(reg, &iomux->gpr[2]); in setup_display()
285 reg = readl(&iomux->gpr[3]); in setup_display()
292 writel(reg, &iomux->gpr[3]); in setup_display()
/u-boot/board/engicam/imx6q/
A Dimx6q.c180 writel(reg, &iomux->gpr[2]); in setup_display()
182 reg = readl(&iomux->gpr[3]); in setup_display()
186 writel(reg, &iomux->gpr[3]); in setup_display()
/u-boot/board/ge/bx50v3/
A Dbx50v3.c234 &iomux->gpr[2]); in setup_display_b850v3()
236 clrbits_le32(&iomux->gpr[3], in setup_display_b850v3()
275 &iomux->gpr[2]); in setup_display_bx50v3()
277 clrsetbits_le32(&iomux->gpr[3], in setup_display_bx50v3()
/u-boot/arch/arm/cpu/arm926ejs/mx27/
A Dgeneric.c237 writel(readl(&regs->port[port].gpr) | (1 << pin), in imx_gpio_mode()
238 &regs->port[port].gpr); in imx_gpio_mode()
240 writel(readl(&regs->port[port].gpr) & ~(1 << pin), in imx_gpio_mode()
241 &regs->port[port].gpr); in imx_gpio_mode()

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