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Searched refs:lo (Results 1 – 25 of 94) sorted by relevance

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/u-boot/lib/efi_loader/
A Defi_load_options.c77 lo->label = (u16 *)data; in efi_deserialize_load_option()
79 if (lo->label[len]) in efi_deserialize_load_option()
87 len = lo->file_path_length; in efi_deserialize_load_option()
96 lo->optional_data = data; in efi_deserialize_load_option()
123 if (lo->optional_data) in efi_serialize_load_option()
132 memcpy(p, &lo->attributes, sizeof(lo->attributes)); in efi_serialize_load_option()
133 p += sizeof(lo->attributes); in efi_serialize_load_option()
135 memcpy(p, &lo->file_path_length, sizeof(lo->file_path_length)); in efi_serialize_load_option()
141 memcpy(p, lo->file_path, lo->file_path_length); in efi_serialize_load_option()
142 p += lo->file_path_length; in efi_serialize_load_option()
[all …]
A Defi_bootmgr.c80 struct efi_load_option lo; in try_load_entry() local
96 ret = efi_deserialize_load_option(&lo, load_option, &size); in try_load_entry()
102 if (lo.attributes & LOAD_OPTION_ACTIVE) { in try_load_entry()
106 __func__, lo.label, lo.file_path); in try_load_entry()
108 ret = EFI_CALL(efi_load_image(true, efi_root, lo.file_path, in try_load_entry()
112 varname, lo.label); in try_load_entry()
128 log_info("Booting: %ls\n", lo.label); in try_load_entry()
140 memcpy(*load_options, lo.optional_data, size); in try_load_entry()
/u-boot/arch/x86/cpu/ivybridge/
A Dmodel_206ax.c58 msr.lo = 0; in enable_vmx()
79 msr.lo |= (1 << 2); in enable_vmx()
200 limit.lo = 0; in set_power_limits()
218 limit.lo = msr.lo & 0xff; in set_power_limits()
270 msr.lo &= ~0x1fff; in configure_c_states()
276 msr.lo &= ~0x1fff; in configure_c_states()
296 msr.lo = 0; in configure_misc()
301 msr.lo = 1 << 4; in configure_misc()
324 msr.lo |= 1; in configure_dca_cap()
353 msr.lo &= ~0xf; in set_energy_perf_bias()
[all …]
/u-boot/arch/x86/cpu/broadwell/
A Dcpu_full.c222 msr.lo &= ~0xffff; in initialize_vr_config()
345 perf_ctl.lo = (msr.lo & 0xff) << 8; in set_max_ratio()
349 perf_ctl.lo = (msr.lo & 0xff) << 8; in set_max_ratio()
353 perf_ctl.lo = msr.lo & 0xff00; in set_max_ratio()
395 msr.lo = 0; in configure_mca()
483 msr.lo = 0; in configure_misc()
488 msr.lo = 1 << 4; in configure_misc()
502 msr.lo |= 1; in configure_dca_cap()
519 msr.lo &= ~0xf; in set_energy_perf_bias()
598 limit.lo = 0; in cpu_set_power_limits()
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A Dcpu.c52 perf_ctl.lo = (msr.lo & 0xff) << 8; in set_max_freq()
56 perf_ctl.lo = msr.lo & 0xff00; in set_max_freq()
63 ((perf_ctl.lo >> 8) & 0xff) * INTEL_BCLK_MHZ); in set_max_freq()
/u-boot/arch/x86/cpu/intel_common/
A Dcpu.c93 nominal_ratio = msr.lo & 0xff; in cpu_set_flex_ratio_to_tdp_nominal()
100 flex_ratio.lo &= ~0xff00; in cpu_set_flex_ratio_to_tdp_nominal()
101 flex_ratio.lo |= nominal_ratio << 8; in cpu_set_flex_ratio_to_tdp_nominal()
102 flex_ratio.lo |= FLEX_RATIO_LOCK; in cpu_set_flex_ratio_to_tdp_nominal()
148 if (msr.lo & (1 << 30)) { in cpu_configure_thermal_target()
183 cpu_set_perf_control(msr.lo); in cpu_set_p_state_to_turbo_ratio()
257 ratio_max = msr.lo & 0xff; in cpu_get_max_ratio()
261 ratio_max = (msr.lo >> 8) & 0xff; in cpu_get_max_ratio()
294 return msr.lo & 0xff; in cpu_get_max_turbo_ratio()
318 num_banks = msr.lo & 0xff; in cpu_mca_configure()
[all …]
/u-boot/arch/nios2/cpu/
A Dstart.S33 ori r4, r0, %lo(ICACHE_LINE_SIZE)
35 ori r5, r5, %lo(ICACHE_SIZE_MAX)
48 ori et, et, %lo(_exception)
64 ori r5, r5, %lo(DCACHE_SIZE_MAX)
78 ori r5, r5, %lo(_cur - _start)
98 ori r4, r4, %lo(_reloc)
111 ori r2, r2, %lo(debug_uart_init@h)
132 ori r2, r2, %lo(board_init_f@h)
166 ori r5, r5, %lo(__bss_start)
168 ori r6, r6, %lo(__bss_end)
[all …]
A Dexceptions.S70 ori r3, r3, %lo(external_interrupt)
86 ori r3, r3, %lo(OPC_TRAP)
91 ori r3, r3, %lo(trap_handler)
99 ori r3, r3, %lo(soft_emulation)
/u-boot/arch/x86/cpu/baytrail/
A Dcpu.c74 msr.lo |= MISC_ENABLE_ENHANCED_SPEEDSTEP; in set_max_freq()
82 perf_ctl.lo = (msr.lo & 0x3f0000) >> 8; in set_max_freq()
89 perf_ctl.lo |= (msr.lo & 0x7f0000) >> 16; in set_max_freq()
126 switch (clk_info.lo & 0x3) { in bus_freq()
150 return bclk * ((platform_info.lo >> 8) & 0xff); in tsc_freq()
/u-boot/arch/x86/cpu/apollolake/
A Dfsp_s.c77 power_unit = 1 << (rapl_msr_reg.lo & 0xf); in set_power_limits()
81 tdp = rapl_msr_reg.lo & PKG_POWER_LIMIT_MASK; in set_power_limits()
83 min_power = (rapl_msr_reg.lo >> 16) & PKG_POWER_LIMIT_MASK; in set_power_limits()
106 limit.lo = tdp & PKG_POWER_LIMIT_MASK; in set_power_limits()
108 limit.lo |= PKG_POWER_LIMIT_CLAMP; in set_power_limits()
110 limit.lo |= PKG_POWER_LIMIT_EN; in set_power_limits()
111 limit.lo |= (MB_POWER_LIMIT1_TIME_DEFAULT & in set_power_limits()
129 writel(limit.lo & ~PKG_POWER_LIMIT_EN, MCHBAR_REG(MCHBAR_RAPL_PPL)); in set_power_limits()
A Dcpu_common.c20 msr.lo |= FLUSH_DL1_L2; in cpu_flush_l1d_to_l2()
39 msr.lo = EMULATE_PM_TMR_EN | (upriv->acpi_base + R_ACPI_PM1_TMR); in enable_pm_timer_emulation()
40 debug("PM timer %x %x\n", msr.hi, msr.lo); in enable_pm_timer_emulation()
/u-boot/scripts/
A Dcleanpatch20 my($lo) = '';
30 $lo .= "\t" x $ntab;
34 $lo .= " " x $nsp;
37 $lo .= $c;
42 $lo .= " " x $nsp;
45 $lo .= $c;
49 $lo .= " " x $nsp;
50 return $lo;
/u-boot/lib/bzip2/
A Dbzlib_blocksort.c81 if (lo == hi) return; in fallbackSimpleSort()
83 if (hi - lo > 3) { in fallbackSimpleSort()
140 Int32 sp, lo, hi; in fallbackQSort3() local
154 fpop ( lo, hi ); in fallbackQSort3()
173 unLo = ltLo = lo; in fallbackQSort3()
207 n = fmin(ltLo-lo, unLo-ltLo); fvswap(lo, unLo-n, n); in fallbackQSort3()
538 bigN = hi - lo + 1; in mainSimpleSort()
548 i = lo + h; in mainSimpleSort()
672 Int32 sp, lo, hi, d; in mainQSort3() local
702 unLo = ltLo = lo; in mainQSort3()
[all …]
/u-boot/cmd/
A Dmii.c18 ushort lo; member
165 if (pdesc->hi == pdesc->lo) in dump_field()
166 printf("%2u ", pdesc->lo); in dump_field()
168 printf("%2u-%2u", pdesc->hi, pdesc->lo); in dump_field()
170 printf(" = %5u %s", (regval >> pdesc->lo) & pdesc->mask, in dump_field()
188 mask_in_place = pdesc->mask << pdesc->lo; in dump_reg()
215 const ushort sel_bits = (regval >> pdesc->lo) & pdesc->mask; in special_field()
217 if ((regno == MII_BMCR) && (pdesc->lo == 6)) { in special_field()
229 else if ((regno == MII_BMCR) && (pdesc->lo == 8)) { in special_field()
235 else if ((regno == MII_ADVERTISE) && (pdesc->lo == 0)) { in special_field()
[all …]
A Defidebug.c826 struct efi_load_option lo; in do_efi_boot_add() local
866 lo.file_path = file_path; in do_efi_boot_add()
872 lo.optional_data = NULL; in do_efi_boot_add()
895 free(lo.label); in do_efi_boot_add()
958 struct efi_load_option lo; in show_efi_boot_opt_data() local
970 label_len16 = u16_strlen(lo.label); in show_efi_boot_opt_data()
986 lo.attributes); in show_efi_boot_opt_data()
989 dp_str = efi_dp_str(lo.file_path); in show_efi_boot_opt_data()
995 lo.optional_data, *size, true); in show_efi_boot_opt_data()
1129 struct efi_load_option lo; in show_efi_boot_order() local
[all …]
/u-boot/drivers/timer/
A Driscv_timer.c21 __maybe_unused u32 hi, lo; in riscv_timer_get_count() local
28 lo = csr_read(CSR_TIME); in riscv_timer_get_count()
31 return ((u64)hi << 32) | lo; in riscv_timer_get_count()
A Dtsc_timer.c153 u32 lo, hi, ratio, freq_id, freq; in cpu_mhz_from_msr() local
165 rdmsr(MSR_PLATFORM_INFO, lo, hi); in cpu_mhz_from_msr()
166 ratio = (lo >> 8) & 0xff; in cpu_mhz_from_msr()
168 rdmsr(MSR_IA32_PERF_STATUS, lo, hi); in cpu_mhz_from_msr()
179 rdmsr(MSR_FSB_FREQ, lo, hi); in cpu_mhz_from_msr()
180 freq_id = lo & 0x7; in cpu_mhz_from_msr()
/u-boot/tools/
A Dgen_ethaddr_crc.c19 uint8_t nibble_to_hex(const char *nibble, bool lo) in nibble_to_hex() argument
21 return (strtol(nibble, NULL, 16) << (lo ? 0 : 4)) & (lo ? 0x0f : 0xf0); in nibble_to_hex()
/u-boot/arch/xtensa/lib/
A Dtime.c53 ulong lo, hi, i; in __udelay() local
58 lo = usec & ((1<<22)-1); in __udelay()
62 delay_cycles(mhz * lo); in __udelay()
/u-boot/include/
A Dhexdump.h59 int lo = hex_to_bin(*src++); in hex2bin() local
61 if ((hi < 0) || (lo < 0)) in hex2bin()
64 *dst++ = (hi << 4) | lo; in hex2bin()
/u-boot/arch/x86/cpu/
A Dlapic.c73 msr.lo |= MSR_IA32_APICBASE_ENABLE; in enable_lapic()
74 msr.lo &= ~MSR_IA32_APICBASE_BASE; in enable_lapic()
75 msr.lo |= LAPIC_DEFAULT_BASE; in enable_lapic()
86 msr.lo &= ~MSR_IA32_APICBASE_ENABLE; in disable_lapic()
/u-boot/lib/rsa/
A Drsa-keyprop.c397 static uint32_t br_divrem(uint32_t hi, uint32_t lo, uint32_t d, uint32_t *r) in br_divrem() argument
412 w = (hi << j) | (lo >> k); in br_divrem()
415 lo2 = lo - (d << k); in br_divrem()
417 lo = MUX(ctl, lo2, lo); in br_divrem()
420 cf = GE(lo, d) | hi; in br_divrem()
422 *r = MUX(cf, lo - d, lo); in br_divrem()
430 static uint32_t br_rem(uint32_t hi, uint32_t lo, uint32_t d) in br_rem() argument
434 br_divrem(hi, lo, d, &r); in br_rem()
442 static uint32_t br_div(uint32_t hi, uint32_t lo, uint32_t d) in br_div() argument
446 return br_divrem(hi, lo, d, &r); in br_div()
/u-boot/include/linux/
A Dkernel.h215 #define clamp(val, lo, hi) min((typeof(val))max(val, lo), hi) argument
243 #define clamp_t(type, val, lo, hi) min_t(type, max_t(type, val, lo), hi) argument
256 #define clamp_val(val, lo, hi) clamp_t(typeof(val), val, lo, hi) argument
/u-boot/arch/x86/lib/
A Dcoreboot_table.c126 map->start.lo = e820[i].addr & 0xffffffff; in write_coreboot_table()
128 map->size.lo = e820[i].size & 0xffffffff; in write_coreboot_table()
136 map->start.lo = cfg_tables->start & 0xffffffff; in write_coreboot_table()
138 map->size.lo = cfg_tables->size & 0xffffffff; in write_coreboot_table()
/u-boot/arch/arm/lib/
A Drelocate_64.S54 b.lo copy_loop
77 b.lo fixloop

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