| /u-boot/drivers/net/phy/ |
| A D | et1011c.c | 43 int mii_reg; in et1011c_parse_status() local
46 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, ET1011C_STATUS_REG); in et1011c_parse_status()
48 if (mii_reg & ET1011C_DUPLEX_STATUS) in et1011c_parse_status()
53 speed = mii_reg & ET1011C_SPEED_MASK; in et1011c_parse_status()
57 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, ET1011C_CONFIG_REG); in et1011c_parse_status()
58 mii_reg &= ~ET1011C_TX_FIFO_MASK; in et1011c_parse_status()
60 mii_reg | in et1011c_parse_status()
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| A D | natsemi.c | 66 int mii_reg; in dp83865_parse_status() local
68 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_DP83865_LANR); in dp83865_parse_status()
70 switch (mii_reg & MIIM_DP83865_SPD_MASK) { in dp83865_parse_status()
86 if (mii_reg & MIIM_DP83865_DPX_FULL) in dp83865_parse_status()
119 int mii_reg; in dp83848_parse_status() local
121 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); in dp83848_parse_status()
123 if(mii_reg & (BMSR_100FULL | BMSR_100HALF)) { in dp83848_parse_status()
129 if (mii_reg & (BMSR_10FULL | BMSR_100FULL)) { in dp83848_parse_status()
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| A D | davicom.c | 44 int mii_reg; in dm9161_parse_status() local
46 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_DM9161_SCSR); in dm9161_parse_status()
48 if (mii_reg & (MIIM_DM9161_SCSR_100F | MIIM_DM9161_SCSR_100H)) in dm9161_parse_status()
53 if (mii_reg & (MIIM_DM9161_SCSR_100F | MIIM_DM9161_SCSR_10F)) in dm9161_parse_status()
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| A D | realtek.c | 259 unsigned int mii_reg; in rtl8211x_parse_status() local
263 if (!(mii_reg & MIIM_RTL8211x_PHYSTAT_SPDDONE)) { in rtl8211x_parse_status()
280 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, in rtl8211x_parse_status()
286 if (mii_reg & MIIM_RTL8211x_PHYSTAT_LINK) in rtl8211x_parse_status()
292 if (mii_reg & MIIM_RTL8211x_PHYSTAT_DUPLEX) in rtl8211x_parse_status()
297 speed = (mii_reg & MIIM_RTL8211x_PHYSTAT_SPEED); in rtl8211x_parse_status()
316 unsigned int mii_reg; in rtl8211f_parse_status() local
323 while (!(mii_reg & MIIM_RTL8211F_PHYSTAT_LINK)) { in rtl8211f_parse_status()
333 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, in rtl8211f_parse_status()
337 if (mii_reg & MIIM_RTL8211F_PHYSTAT_DUPLEX) in rtl8211f_parse_status()
[all …]
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| A D | smsc.c | 18 int mii_reg; in smsc_parse_status() local
20 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); in smsc_parse_status()
22 if (mii_reg & (BMSR_100FULL | BMSR_100HALF)) in smsc_parse_status()
27 if (mii_reg & (BMSR_10FULL | BMSR_100FULL)) in smsc_parse_status()
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| A D | lxt.c | 23 int mii_reg; in lxt971_parse_status() local
26 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_LXT971_SR2); in lxt971_parse_status()
27 speed = mii_reg & MIIM_LXT971_SR2_SPEED_MASK; in lxt971_parse_status()
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| A D | marvell.c | 157 unsigned int mii_reg; in m88e1xxx_parse_status() local
159 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_88E1xxx_PHY_STATUS); in m88e1xxx_parse_status()
161 if ((mii_reg & MIIM_88E1xxx_PHYSTAT_LINK) && in m88e1xxx_parse_status()
162 !(mii_reg & MIIM_88E1xxx_PHYSTAT_SPDDONE)) { in m88e1xxx_parse_status()
166 while (!(mii_reg & MIIM_88E1xxx_PHYSTAT_SPDDONE)) { in m88e1xxx_parse_status()
177 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, in m88e1xxx_parse_status()
183 if (mii_reg & MIIM_88E1xxx_PHYSTAT_LINK) in m88e1xxx_parse_status()
189 if (mii_reg & MIIM_88E1xxx_PHYSTAT_DUPLEX) in m88e1xxx_parse_status()
194 speed = mii_reg & MIIM_88E1xxx_PHYSTAT_SPEED; in m88e1xxx_parse_status()
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| A D | phy.c | 226 unsigned int mii_reg; in genphy_update_link() local
232 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); in genphy_update_link()
238 if (phydev->link && mii_reg & BMSR_LSTATUS) in genphy_update_link()
242 !(mii_reg & BMSR_ANEGCOMPLETE)) { in genphy_update_link()
247 while (!(mii_reg & BMSR_ANEGCOMPLETE)) { in genphy_update_link()
266 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); in genphy_update_link()
273 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); in genphy_update_link()
275 if (mii_reg & BMSR_LSTATUS) in genphy_update_link()
295 int mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); in genphy_parse_link() local
357 if ((mii_reg & BMSR_ESTATEN) && !(mii_reg & BMSR_ERCAP)) in genphy_parse_link()
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| A D | broadcom.c | 67 unsigned int mii_reg; in bcm54xx_parse_status() local
69 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_BCM54xx_AUXSTATUS); in bcm54xx_parse_status()
71 switch ((mii_reg & MIIM_BCM54xx_AUXSTATUS_LINKMODE_MASK) >> in bcm54xx_parse_status()
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| A D | vitesse.c | 88 int mii_reg; in vitesse_parse_status() local
90 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_CIS82xx_AUX_CONSTAT); in vitesse_parse_status()
92 if (mii_reg & MIIM_CIS82xx_AUXCONSTAT_DUPLEX) in vitesse_parse_status()
97 speed = mii_reg & MIIM_CIS82xx_AUXCONSTAT_SPEED; in vitesse_parse_status()
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| A D | mv88e61xx.c | 481 unsigned int mii_reg; in mv88e61xx_parse_status() local
483 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, PHY_REG_STATUS1); in mv88e61xx_parse_status()
485 if ((mii_reg & PHY_REG_STATUS1_LINK) && in mv88e61xx_parse_status()
486 !(mii_reg & PHY_REG_STATUS1_SPDDONE)) { in mv88e61xx_parse_status()
490 while (!(mii_reg & PHY_REG_STATUS1_SPDDONE)) { in mv88e61xx_parse_status()
501 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, in mv88e61xx_parse_status()
507 if (mii_reg & PHY_REG_STATUS1_LINK) in mv88e61xx_parse_status()
513 if (mii_reg & PHY_REG_STATUS1_DUPLEX) in mv88e61xx_parse_status()
518 speed = mii_reg & PHY_REG_STATUS1_SPEED; in mv88e61xx_parse_status()
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| A D | mscc.c | 1083 u16 mii_reg; in mscc_parse_status() local
1085 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_AUX_CNTRL_STAT_REG); in mscc_parse_status()
1087 if (mii_reg & MIIM_AUX_CNTRL_STAT_F_DUPLEX) in mscc_parse_status()
1092 speed = mii_reg & MIIM_AUX_CNTRL_STAT_SPEED_MASK; in mscc_parse_status()
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| /u-boot/scripts/coccinelle/net/ |
| A D | mdio_register.cocci | 10 @ mii_reg @
27 identifier mii_reg.readfunc;
49 identifier mii_reg.readfunc;
81 identifier mii_reg.readfunc;
99 identifier mii_reg.readfunc;
110 identifier mii_reg.writefunc;
134 identifier mii_reg.writefunc;
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| /u-boot/drivers/net/ |
| A D | smc91111.c | 888 word mii_reg; in smc_read_phy_register() local
952 mii_reg = SMC_inw (dev, MII_REG); in smc_read_phy_register()
955 mii_reg &= ~(MII_MDOE | MII_MCLK | MII_MDI | MII_MDO); in smc_read_phy_register()
960 SMC_outw (dev, mii_reg | bits[i], MII_REG); in smc_read_phy_register()
965 SMC_outw (dev, mii_reg | bits[i] | MII_MCLK, MII_REG); in smc_read_phy_register()
972 SMC_outw (dev, mii_reg, MII_REG); in smc_read_phy_register()
1006 word mii_reg; in smc_write_phy_register() local
1073 mii_reg = SMC_inw (dev, MII_REG); in smc_write_phy_register()
1076 mii_reg &= ~(MII_MDOE | MII_MCLK | MII_MDI | MII_MDO); in smc_write_phy_register()
1081 SMC_outw (dev, mii_reg | bits[i], MII_REG); in smc_write_phy_register()
[all …]
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| /u-boot/drivers/qe/ |
| A D | uec_phy.c | 138 enum enet_tbi_mii_reg mii_reg = (enum enet_tbi_mii_reg)regnum; in uec_write_phy_reg() local
158 tmp_reg = ((u32)mii_id << MIIMADD_PHY_ADDRESS_SHIFT) | mii_reg; in uec_write_phy_reg()
179 enum enet_tbi_mii_reg mii_reg = (enum enet_tbi_mii_reg)regnum; in uec_read_phy_reg() local
198 tmp_reg = ((u32)mii_id << MIIMADD_PHY_ADDRESS_SHIFT) | mii_reg; in uec_read_phy_reg()
218 mii_id, mii_reg, (u32)&ug_regs->miimcfg); in uec_read_phy_reg()
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