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Searched refs:outw (Results 1 – 23 of 23) sorted by relevance

/u-boot/board/renesas/r2dplus/
A Dr2dplus.c43 outw(CFCTL_EN, FPGA_CFCTL); /* CF enable */ in ide_set_reset()
44 outw(inw(FPGA_CFPOW)|CFPOW_ON, FPGA_CFPOW); /* Power OM */ in ide_set_reset()
45 outw(CFCDINTCLR_EN, FPGA_CFCDINTCLR); /* Int clear */ in ide_set_reset()
/u-boot/arch/microblaze/include/asm/
A Dio.h50 #define outw(x, addr) ((void)writew(x, addr)) macro
75 #define outw_p(val, port) outw((val), (port))
127 outw(*p++, port); in io_outsw()
/u-boot/arch/xtensa/include/asm/
A Dio.h62 #define outw(val, port) writew((val), (u16 *)((unsigned long)(port))) macro
69 #define outw_p(val, port) outw((val), (port))
/u-boot/arch/x86/lib/
A Dacpi.c108 outw(val | PM1_CNT_SCI_EN, pm1_cnt); in enter_acpi_mode()
/u-boot/drivers/net/
A Drtl8139.c371 outw(0, priv->ioaddr + RTL_REG_INTRMASK); in rtl8139_reset()
409 outw(status, priv->ioaddr + RTL_REG_INTRSTATUS); in rtl8139_send_common()
451 outw(priv->rxstatus & ~rxstat, priv->ioaddr + RTL_REG_INTRSTATUS); in rtl8139_recv_common()
502 outw(priv->cur_rx - 16, priv->ioaddr + RTL_REG_RXBUFPTR); in rtl8139_free_pkt_common()
508 outw(priv->rxstatus & rxstat, priv->ioaddr + RTL_REG_INTRSTATUS); in rtl8139_free_pkt_common()
/u-boot/arch/sh/include/asm/
A Dio.h85 #define outw(v, p) __raw_writew(cpu_to_le16(v), p) macro
101 #define outw_p(val, port) outw((val), (port))
116 #define out_le16(port, val) outw(val, port)
/u-boot/arch/x86/cpu/
A Dpci.c48 outw(value, PCI_REG_DATA + (offset & 2)); in pci_x86_write_config()
/u-boot/cmd/
A Dio.c111 outw((u16) val, addr); in do_io_iow()
/u-boot/drivers/sysreset/
A Dsysreset_x86.c54 outw(PWRBTN_STS, pm.base + pm.pm1_sts_ofs); in pch_sysreset_power_off()
/u-boot/include/
A Dusbdevice.h61 #ifndef outw
62 #define outw(val,p) (*(volatile u16*)(p) = (val)) macro
100 outw( *(__b2 + __i), r); \
/u-boot/arch/x86/cpu/qemu/
A Dqemu.c41 outw(cpu_to_le16(entry), FW_CONTROL_PORT); in qemu_x86_fwcfg_read_entry_pio()
/u-boot/arch/nios2/include/asm/
A Dio.h79 #define outw(val, addr) writew(val,addr) macro
107 while (count--) outw (*p++, port); in outsw()
/u-boot/drivers/bios_emulator/include/
A Dx86emu.h94 void (X86APIP outw) (X86EMU_pioAddr addr, u16 val);
/u-boot/arch/m68k/include/asm/
A Dio.h57 #define outw(val, port) out_be16((u16 *)((port)+_IO_BASE), (val)) macro
62 #define outw(val, port) out_le16((u16 *)((port)+_IO_BASE), (val)) macro
/u-boot/drivers/bios_emulator/
A Dbiosemui.h135 #define PM_outpw(port,val) outw(val,port+VIDEO_IO_OFFSET)
/u-boot/drivers/bios_emulator/x86emu/
A Dsys.c272 sys_outw = funcs->outw; in X86EMU_setupPioFuncs()
/u-boot/arch/x86/include/asm/
A Dio.h199 #define outw(val, port) _outw(val, (uintptr_t)(port)) macro
302 IO_COND(addr, outw(value, port), writew(value, addr)); in iowrite16()
/u-boot/arch/powerpc/include/asm/
A Dio.h57 #define outw(val, port) out_be16((u16 *)((port)+_IO_BASE), (val)) macro
62 #define outw(val, port) out_le16((u16 *)((port)+_IO_BASE), (val)) macro
/u-boot/arch/nds32/include/asm/
A Dio.h244 #define outw(v, p) __raw_writew(cpu_to_le16(v), __io(p)) macro
324 #define outw_p(val, port) outw((val), (port))
/u-boot/arch/riscv/include/asm/
A Dio.h231 #define outw(v, p) __raw_writew(cpu_to_le16(v), __io(p)) macro
338 #define outw_p(val, port) outw((val), (port))
/u-boot/arch/arm/include/asm/
A Dio.h283 #define outw(v,p) __raw_writew(cpu_to_le16(v),__io(p)) macro
300 #define outw_p(val,port) outw((val),(port))
/u-boot/arch/x86/cpu/ivybridge/
A Dlpc.c496 outw(1 << 11, DEFAULT_PMBASE | 0x60 | 0x08); /* halt timer */ in bd82x6x_lpc_early_init()
/u-boot/arch/sandbox/include/asm/
A Dio.h135 #define outw(val, port) _outw(val, (uintptr_t)(port)) macro

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