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Searched refs:pin_banks (Results 1 – 19 of 19) sorted by relevance

/u-boot/drivers/pinctrl/exynos/
A Dpinctrl-exynos7420.c90 .pin_banks = exynos7420_pin_banks0,
94 .pin_banks = exynos7420_pin_banks1,
98 .pin_banks = exynos7420_pin_banks2,
A Dpinctrl-exynos.h41 const struct samsung_pin_bank_data *pin_banks; member
A Dpinctrl-exynos.c42 const struct samsung_pin_bank_data *bank_data = pin_ctrl->pin_banks; in pin_to_bank_base()
/u-boot/drivers/pinctrl/nexell/
A Dpinctrl-s5pxx18.c96 nx_gpio_open_module((void *)(reg + ctrl->pin_banks[i].offset)); in s5pxx18_pinctrl_gpio_init()
107 reg += ctrl->pin_banks[ctrl->nr_banks - 1].offset; in s5pxx18_pinctrl_alive_init()
202 .pin_banks = s5pxx18_pin_banks,
A Dpinctrl-nexell.h38 const struct nexell_pin_bank_data *pin_banks; member
A Dpinctrl-nexell.c24 const struct nexell_pin_bank_data *bank_data = pin_ctrl->pin_banks; in pin_to_bank_base()
/u-boot/drivers/pinctrl/rockchip/
A Dpinctrl-rockchip-core.c158 return rockchip_get_mux(&ctrl->pin_banks[banknum], index); in rockchip_pinctrl_get_gpio_mux()
436 ret = rockchip_set_mux(&ctrl->pin_banks[bank], pin, mux);
467 ret = rockchip_pinconf_set(&ctrl->pin_banks[bank], pin,
498 bank = ctrl->pin_banks;
A Dpinctrl-rk3036.c85 .pin_banks = rk3036_pin_banks,
A Dpinctrl-rk3188.c110 .pin_banks = rk3188_pin_banks,
A Dpinctrl-rk3368.c157 .pin_banks = rk3368_pin_banks,
A Dpinctrl-rk3128.c185 .pin_banks = rk3128_pin_banks,
A Dpinctrl-rk3288.c226 .pin_banks = rk3288_pin_banks,
A Dpinctrl-rk322x.c271 .pin_banks = rk3228_pin_banks,
A Dpinctrl-rockchip.h258 struct rockchip_pin_bank *pin_banks; member
A Dpinctrl-rv1108.c268 .pin_banks = rv1108_pin_banks,
A Dpinctrl-rk3399.c293 .pin_banks = rk3399_pin_banks,
A Dpinctrl-rk3328.c299 .pin_banks = rk3328_pin_banks,
A Dpinctrl-px30.c338 .pin_banks = px30_pin_banks,
A Dpinctrl-rk3308.c435 .pin_banks = rk3308_pin_banks,

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