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Searched refs:psc0 (Results 1 – 8 of 8) sorted by relevance

/u-boot/arch/arm/mach-davinci/
A Dpsc.c42 mdstat = &psc_regs->psc0.mdstat[id]; in lpsc_transition()
43 mdctl = &psc_regs->psc0.mdctl[id]; in lpsc_transition()
/u-boot/arch/arm/dts/
A Dda850.dtsi64 clocks = <&psc0 15>;
65 resets = <&psc0 15>;
76 psc0: clock-controller@10000 { label
77 compatible = "ti,da850-psc0";
383 power-domains = <&psc0 0>;
390 power-domains = <&psc0 1>;
397 power-domains = <&psc0 2>;
424 clocks = <&psc0 9>;
497 clocks = <&psc0 5>;
590 clocks = <&psc0 4>;
[all …]
A Dam335x-pdu001.dts319 psc0 = <0x97>;
/u-boot/board/davinci/da8xxevm/
A Domapl138_lcdk.c251 mdstat = &psc_regs->psc0.mdstat[id]; in dsp_lpsc_on()
252 mdctl = &psc_regs->psc0.mdctl[id]; in dsp_lpsc_on()
A Dda850evm.c82 mdstat = &psc_regs->psc0.mdstat[id]; in dsp_lpsc_on()
83 mdctl = &psc_regs->psc0.mdctl[id]; in dsp_lpsc_on()
/u-boot/drivers/net/
A Dmvgbe.c458 MVGBE_REG_WR(regs->psc0, PORT_SERIAL_CONTROL_VALUE); in __mvgbe_init()
469 MVGBE_REG_WR(regs->psc0, MVGBE_MAX_RX_PACKET_9700BYTE in __mvgbe_init()
470 | (MVGBE_REG_RD(regs->psc0) & MRU_MASK)); in __mvgbe_init()
473 MVGBE_REG_BITS_SET(regs->psc0, MVGBE_SERIAL_PORT_EN); in __mvgbe_init()
530 MVGBE_REG_BITS_RESET(regs->psc0, MVGBE_SERIAL_PORT_EN); in __mvgbe_halt()
A Dmvgbe.h378 u32 psc0; member
/u-boot/arch/arm/mach-davinci/include/mach/
A Dhardware.h181 } psc0; member

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