Searched refs:MSR_P4_BPU_PERFCTR0 (Results 1 – 3 of 3) sorted by relevance
382 clear_msr_range(MSR_P4_BPU_PERFCTR0, 18); in setup_p4_watchdog()
518 #define MSR_P4_BPU_PERFCTR0 0x00000300 macro
83 { CTR_BPU_0, MSR_P4_BPU_PERFCTR0, MSR_P4_BPU_CCCR0 },
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