1Xilinx LogiCORE Partial Reconfig Decoupler Softcore 2 3The Xilinx LogiCORE Partial Reconfig Decoupler manages one or more 4decouplers / fpga bridges. 5The controller can decouple/disable the bridges which prevents signal 6changes from passing through the bridge. The controller can also 7couple / enable the bridges which allows traffic to pass through the 8bridge normally. 9 10Xilinx LogiCORE Dynamic Function eXchange(DFX) AXI shutdown manager 11Softcore is compatible with the Xilinx LogiCORE pr-decoupler. 12 13The Dynamic Function eXchange AXI shutdown manager prevents AXI traffic 14from passing through the bridge. The controller safely handles AXI4MM 15and AXI4-Lite interfaces on a Reconfigurable Partition when it is 16undergoing dynamic reconfiguration, preventing the system deadlock 17that can occur if AXI transactions are interrupted by DFX 18 19The Driver supports only MMIO handling. A PR region can have multiple 20PR Decouplers which can be handled independently or chained via decouple/ 21decouple_status signals. 22 23Required properties: 24- compatible : Should contain "xlnx,pr-decoupler-1.00" followed by 25 "xlnx,pr-decoupler" or 26 "xlnx,dfx-axi-shutdown-manager-1.00" followed by 27 "xlnx,dfx-axi-shutdown-manager" 28- regs : base address and size for decoupler module 29- clocks : input clock to IP 30- clock-names : should contain "aclk" 31 32See Documentation/devicetree/bindings/fpga/fpga-region.txt and 33Documentation/devicetree/bindings/fpga/fpga-bridge.txt for generic bindings. 34 35Example: 36Partial Reconfig Decoupler: 37 fpga-bridge@100000450 { 38 compatible = "xlnx,pr-decoupler-1.00", 39 "xlnx-pr-decoupler"; 40 regs = <0x10000045 0x10>; 41 clocks = <&clkc 15>; 42 clock-names = "aclk"; 43 bridge-enable = <0>; 44 }; 45 46Dynamic Function eXchange AXI shutdown manager: 47 fpga-bridge@100000450 { 48 compatible = "xlnx,dfx-axi-shutdown-manager-1.00", 49 "xlnx,dfx-axi-shutdown-manager"; 50 regs = <0x10000045 0x10>; 51 clocks = <&clkc 15>; 52 clock-names = "aclk"; 53 bridge-enable = <0>; 54 }; 55