1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/i2c/renesas,riic.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Renesas RZ/A and RZ/G2L I2C Bus Interface (RIIC)
8
9maintainers:
10  - Chris Brandt <chris.brandt@renesas.com>
11  - Wolfram Sang <wsa+renesas@sang-engineering.com>
12
13allOf:
14  - $ref: /schemas/i2c/i2c-controller.yaml#
15
16properties:
17  compatible:
18    items:
19      - enum:
20          - renesas,riic-r7s72100   # RZ/A1H
21          - renesas,riic-r7s9210    # RZ/A2M
22          - renesas,riic-r9a07g044  # RZ/G2{L,LC}
23      - const: renesas,riic-rz      # RZ/A or RZ/G2L
24
25  reg:
26    maxItems: 1
27
28  interrupts:
29    items:
30      - description: Transmit End Interrupt
31      - description: Receive Data Full Interrupt
32      - description: Transmit Data Empty Interrupt
33      - description: Stop Condition Detection Interrupt
34      - description: Start Condition Detection Interrupt
35      - description: NACK Reception Interrupt
36      - description: Arbitration-Lost Interrupt
37      - description: Timeout Interrupt
38
39  interrupt-names:
40    items:
41      - const: tei
42      - const: ri
43      - const: ti
44      - const: spi
45      - const: sti
46      - const: naki
47      - const: ali
48      - const: tmoi
49
50  clock-frequency:
51    description:
52      Desired I2C bus clock frequency in Hz. The absence of this property
53      indicates the default frequency 100 kHz.
54
55  clocks:
56    maxItems: 1
57
58  power-domains:
59    maxItems: 1
60
61required:
62  - compatible
63  - reg
64  - interrupts
65  - interrupt-names
66  - clocks
67  - clock-frequency
68  - power-domains
69  - '#address-cells'
70  - '#size-cells'
71
72if:
73  properties:
74    compatible:
75      contains:
76        enum:
77          - renesas,riic-r9a07g044
78then:
79  required:
80    - resets
81
82unevaluatedProperties: false
83
84examples:
85  - |
86    #include <dt-bindings/clock/r7s72100-clock.h>
87    #include <dt-bindings/interrupt-controller/arm-gic.h>
88
89    i2c0: i2c@fcfee000 {
90            compatible = "renesas,riic-r7s72100", "renesas,riic-rz";
91            reg = <0xfcfee000 0x44>;
92            interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
93                         <GIC_SPI 158 IRQ_TYPE_EDGE_RISING>,
94                         <GIC_SPI 159 IRQ_TYPE_EDGE_RISING>,
95                         <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
96                         <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
97                         <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
98                         <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
99                         <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
100            interrupt-names = "tei", "ri", "ti", "spi", "sti", "naki", "ali",
101                              "tmoi";
102            clocks = <&mstp9_clks R7S72100_CLK_I2C0>;
103            clock-frequency = <100000>;
104            power-domains = <&cpg_clocks>;
105            #address-cells = <1>;
106            #size-cells = <0>;
107    };
108