1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2 3%YAML 1.2 4--- 5$id: "http://devicetree.org/schemas/media/qcom,msm8996-venus.yaml#" 6$schema: "http://devicetree.org/meta-schemas/core.yaml#" 7 8title: Qualcomm Venus video encode and decode accelerators 9 10maintainers: 11 - Stanimir Varbanov <stanimir.varbanov@linaro.org> 12 13description: | 14 The Venus IP is a video encode and decode accelerator present 15 on Qualcomm platforms 16 17properties: 18 compatible: 19 const: qcom,msm8996-venus 20 21 reg: 22 maxItems: 1 23 24 interrupts: 25 maxItems: 1 26 27 power-domains: 28 maxItems: 1 29 30 clocks: 31 maxItems: 4 32 33 clock-names: 34 items: 35 - const: core 36 - const: iface 37 - const: bus 38 - const: mbus 39 40 iommus: 41 maxItems: 20 42 43 memory-region: 44 maxItems: 1 45 46 video-decoder: 47 type: object 48 49 properties: 50 compatible: 51 const: venus-decoder 52 53 clocks: 54 maxItems: 1 55 56 clock-names: 57 items: 58 - const: core 59 60 power-domains: 61 maxItems: 1 62 63 required: 64 - compatible 65 - clocks 66 - clock-names 67 - power-domains 68 69 additionalProperties: false 70 71 video-encoder: 72 type: object 73 74 properties: 75 compatible: 76 const: venus-encoder 77 78 clocks: 79 maxItems: 1 80 81 clock-names: 82 items: 83 - const: core 84 85 power-domains: 86 maxItems: 1 87 88 required: 89 - compatible 90 - clocks 91 - clock-names 92 - power-domains 93 94 additionalProperties: false 95 96 video-firmware: 97 type: object 98 99 description: | 100 Firmware subnode is needed when the platform does not 101 have TrustZone. 102 103 properties: 104 iommus: 105 maxItems: 1 106 107 required: 108 - iommus 109 110required: 111 - compatible 112 - reg 113 - interrupts 114 - power-domains 115 - clocks 116 - clock-names 117 - iommus 118 - memory-region 119 - video-decoder 120 - video-encoder 121 122additionalProperties: false 123 124examples: 125 - | 126 #include <dt-bindings/interrupt-controller/arm-gic.h> 127 #include <dt-bindings/clock/qcom,mmcc-msm8996.h> 128 129 video-codec@c00000 { 130 compatible = "qcom,msm8996-venus"; 131 reg = <0x00c00000 0xff000>; 132 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 133 clocks = <&mmcc VIDEO_CORE_CLK>, 134 <&mmcc VIDEO_AHB_CLK>, 135 <&mmcc VIDEO_AXI_CLK>, 136 <&mmcc VIDEO_MAXI_CLK>; 137 clock-names = "core", "iface", "bus", "mbus"; 138 power-domains = <&mmcc VENUS_GDSC>; 139 iommus = <&venus_smmu 0x00>, 140 <&venus_smmu 0x01>, 141 <&venus_smmu 0x0a>, 142 <&venus_smmu 0x07>, 143 <&venus_smmu 0x0e>, 144 <&venus_smmu 0x0f>, 145 <&venus_smmu 0x08>, 146 <&venus_smmu 0x09>, 147 <&venus_smmu 0x0b>, 148 <&venus_smmu 0x0c>, 149 <&venus_smmu 0x0d>, 150 <&venus_smmu 0x10>, 151 <&venus_smmu 0x11>, 152 <&venus_smmu 0x21>, 153 <&venus_smmu 0x28>, 154 <&venus_smmu 0x29>, 155 <&venus_smmu 0x2b>, 156 <&venus_smmu 0x2c>, 157 <&venus_smmu 0x2d>, 158 <&venus_smmu 0x31>; 159 memory-region = <&venus_mem>; 160 161 video-decoder { 162 compatible = "venus-decoder"; 163 clocks = <&mmcc VIDEO_SUBCORE0_CLK>; 164 clock-names = "core"; 165 power-domains = <&mmcc VENUS_CORE0_GDSC>; 166 }; 167 168 video-encoder { 169 compatible = "venus-encoder"; 170 clocks = <&mmcc VIDEO_SUBCORE1_CLK>; 171 clock-names = "core"; 172 power-domains = <&mmcc VENUS_CORE1_GDSC>; 173 }; 174 }; 175