1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/memory-controllers/renesas,rpc-if.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Renesas Reduced Pin Count Interface (RPC-IF) 8 9maintainers: 10 - Sergei Shtylyov <sergei.shtylyov@gmail.com> 11 12description: | 13 Renesas RPC-IF allows a SPI flash or HyperFlash connected to the SoC to 14 be accessed via the external address space read mode or the manual mode. 15 16 The flash chip itself should be represented by a subnode of the RPC-IF node. 17 The flash interface is selected based on the "compatible" property of this 18 subnode: 19 - if it contains "jedec,spi-nor", then SPI is used; 20 - if it contains "cfi-flash", then HyperFlash is used. 21 22allOf: 23 - $ref: "/schemas/spi/spi-controller.yaml#" 24 25properties: 26 compatible: 27 items: 28 - enum: 29 - renesas,r8a774a1-rpc-if # RZ/G2M 30 - renesas,r8a774b1-rpc-if # RZ/G2N 31 - renesas,r8a774c0-rpc-if # RZ/G2E 32 - renesas,r8a774e1-rpc-if # RZ/G2H 33 - renesas,r8a77970-rpc-if # R-Car V3M 34 - renesas,r8a77980-rpc-if # R-Car V3H 35 - renesas,r8a77995-rpc-if # R-Car D3 36 - renesas,r8a779a0-rpc-if # R-Car V3U 37 - const: renesas,rcar-gen3-rpc-if # a generic R-Car gen3 or RZ/G2 device 38 39 reg: 40 items: 41 - description: RPC-IF registers 42 - description: direct mapping read mode area 43 - description: write buffer area 44 45 reg-names: 46 items: 47 - const: regs 48 - const: dirmap 49 - const: wbuf 50 51 clocks: 52 maxItems: 1 53 54 power-domains: 55 maxItems: 1 56 57 resets: 58 maxItems: 1 59 60patternProperties: 61 "flash@[0-9a-f]+$": 62 type: object 63 properties: 64 compatible: 65 contains: 66 enum: 67 - cfi-flash 68 - jedec,spi-nor 69 70unevaluatedProperties: false 71 72required: 73 - compatible 74 - reg 75 - reg-names 76 - clocks 77 - power-domains 78 - resets 79 - '#address-cells' 80 - '#size-cells' 81 82examples: 83 - | 84 #include <dt-bindings/clock/renesas-cpg-mssr.h> 85 #include <dt-bindings/power/r8a77995-sysc.h> 86 87 spi@ee200000 { 88 compatible = "renesas,r8a77995-rpc-if", "renesas,rcar-gen3-rpc-if"; 89 reg = <0xee200000 0x200>, 90 <0x08000000 0x4000000>, 91 <0xee208000 0x100>; 92 reg-names = "regs", "dirmap", "wbuf"; 93 clocks = <&cpg CPG_MOD 917>; 94 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 95 resets = <&cpg 917>; 96 #address-cells = <1>; 97 #size-cells = <0>; 98 99 flash@0 { 100 compatible = "jedec,spi-nor"; 101 reg = <0>; 102 spi-max-frequency = <40000000>; 103 spi-tx-bus-width = <1>; 104 spi-rx-bus-width = <1>; 105 }; 106 }; 107