1          Qualcomm SPMI PMICs multi-function device bindings
2
3The Qualcomm SPMI series presently includes PM8941, PM8841 and PMA8084
4PMICs.  These PMICs use a QPNP scheme through SPMI interface.
5QPNP is effectively a partitioning scheme for dividing the SPMI extended
6register space up into logical pieces, and set of fixed register
7locations/definitions within these regions, with some of these regions
8specifically used for interrupt handling.
9
10The QPNP PMICs are used with the Qualcomm Snapdragon series SoCs, and are
11interfaced to the chip via the SPMI (System Power Management Interface) bus.
12Support for multiple independent functions are implemented by splitting the
1316-bit SPMI slave address space into 256 smaller fixed-size regions, 256 bytes
14each. A function can consume one or more of these fixed-size register regions.
15
16Required properties:
17- compatible:      Should contain one of:
18                   "qcom,pm660",
19                   "qcom,pm660l",
20                   "qcom,pm7325",
21                   "qcom,pm8004",
22                   "qcom,pm8005",
23                   "qcom,pm8019",
24                   "qcom,pm8028",
25                   "qcom,pm8110",
26                   "qcom,pm8150",
27                   "qcom,pm8150b",
28                   "qcom,pm8150c",
29                   "qcom,pm8150l",
30                   "qcom,pm8226",
31                   "qcom,pm8350c",
32                   "qcom,pm8841",
33                   "qcom,pm8901",
34                   "qcom,pm8909",
35                   "qcom,pm8916",
36                   "qcom,pm8941",
37                   "qcom,pm8950",
38                   "qcom,pm8994",
39                   "qcom,pm8998",
40                   "qcom,pma8084",
41                   "qcom,pmd9635",
42                   "qcom,pmi8950",
43                   "qcom,pmi8962",
44                   "qcom,pmi8994",
45                   "qcom,pmi8998",
46                   "qcom,pmk8002",
47                   "qcom,pmk8350",
48                   "qcom,pmr735a",
49                   "qcom,smb2351",
50                   or generalized "qcom,spmi-pmic".
51- reg:             Specifies the SPMI USID slave address for this device.
52                   For more information see:
53                   Documentation/devicetree/bindings/spmi/spmi.yaml
54
55Required properties for peripheral child nodes:
56- compatible:      Should contain "qcom,xxx", where "xxx" is a peripheral name.
57
58Optional properties for peripheral child nodes:
59- interrupts:      Interrupts are specified as a 4-tuple. For more information
60                   see:
61                   Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.txt
62- interrupt-names: Corresponding interrupt name to the interrupts property
63
64Each child node of SPMI slave id represents a function of the PMIC. In the
65example below the rtc device node represents a peripheral of pm8941
66SID = 0. The regulator device node represents a peripheral of pm8941 SID = 1.
67
68Example:
69
70	spmi {
71		compatible = "qcom,spmi-pmic-arb";
72
73		pm8941@0 {
74			compatible = "qcom,pm8941", "qcom,spmi-pmic";
75			reg = <0x0 SPMI_USID>;
76
77			rtc {
78				compatible = "qcom,rtc";
79				interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>;
80				interrupt-names = "alarm";
81			};
82		};
83
84		pm8941@1 {
85			compatible = "qcom,pm8941", "qcom,spmi-pmic";
86			reg = <0x1 SPMI_USID>;
87
88			regulator {
89				compatible = "qcom,regulator";
90				regulator-name = "8941_boost";
91			};
92		};
93	};
94