1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2# Copyright (C) 2020 SiFive, Inc.
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/pwm/pwm-sifive.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: SiFive PWM controller
9
10maintainers:
11  - Yash Shah <yash.shah@sifive.com>
12  - Sagar Kadam <sagar.kadam@sifive.com>
13  - Paul Walmsley <paul.walmsley@sifive.com>
14
15description:
16  Unlike most other PWM controllers, the SiFive PWM controller currently
17  only supports one period for all channels in the PWM. All PWMs need to
18  run at the same period. The period also has significant restrictions on
19  the values it can achieve, which the driver rounds to the nearest
20  achievable period. PWM RTL that corresponds to the IP block version
21  numbers can be found here -
22
23  https://github.com/sifive/sifive-blocks/tree/master/src/main/scala/devices/pwm
24
25properties:
26  compatible:
27    items:
28      - enum:
29          - sifive,fu540-c000-pwm
30          - sifive,fu740-c000-pwm
31      - const: sifive,pwm0
32    description:
33      Should be "sifive,<chip>-pwm" and "sifive,pwm<version>". Supported
34      compatible strings are "sifive,fu540-c000-pwm" and
35      "sifive,fu740-c000-pwm" for the SiFive PWM v0 as integrated onto the
36      SiFive FU540 and FU740 chip respectively, and "sifive,pwm0" for the
37      SiFive PWM v0 IP block with no chip integration tweaks.
38      Please refer to sifive-blocks-ip-versioning.txt for details.
39
40  reg:
41    maxItems: 1
42
43  clocks:
44    maxItems: 1
45
46  "#pwm-cells":
47    const: 3
48
49  interrupts:
50    maxItems: 4
51    description:
52      Each PWM instance in FU540-C000 has 4 comparators. One interrupt per comparator.
53
54required:
55  - compatible
56  - reg
57  - clocks
58  - "#pwm-cells"
59  - interrupts
60
61additionalProperties: false
62
63examples:
64  - |
65    pwm:  pwm@10020000 {
66      compatible = "sifive,fu540-c000-pwm", "sifive,pwm0";
67      reg = <0x10020000 0x1000>;
68      clocks = <&tlclk>;
69      interrupt-parent = <&plic>;
70      interrupts = <42>, <43>, <44>, <45>;
71      #pwm-cells = <3>;
72    };
73