1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef __ALPHA_MCE_H
3 #define __ALPHA_MCE_H
4 
5 /*
6  * This is the logout header that should be common to all platforms
7  * (assuming they are running OSF/1 PALcode, I guess).
8  */
9 struct el_common {
10 	unsigned int	size;		/* size in bytes of logout area */
11 	unsigned int	sbz1	: 30;	/* should be zero */
12 	unsigned int	err2	:  1;	/* second error */
13 	unsigned int	retry	:  1;	/* retry flag */
14 	unsigned int	proc_offset;	/* processor-specific offset */
15 	unsigned int	sys_offset;	/* system-specific offset */
16 	unsigned int	code;		/* machine check code */
17 	unsigned int	frame_rev;	/* frame revision */
18 };
19 
20 /* Machine Check Frame for uncorrectable errors (Large format)
21  *      --- This is used to log uncorrectable errors such as
22  *          double bit ECC errors.
23  *      --- These errors are detected by both processor and systems.
24  */
25 struct el_common_EV5_uncorrectable_mcheck {
26         unsigned long   shadow[8];        /* Shadow reg. 8-14, 25           */
27         unsigned long   paltemp[24];      /* PAL TEMP REGS.                 */
28         unsigned long   exc_addr;         /* Address of excepting instruction*/
29         unsigned long   exc_sum;          /* Summary of arithmetic traps.   */
30         unsigned long   exc_mask;         /* Exception mask (from exc_sum). */
31         unsigned long   pal_base;         /* Base address for PALcode.      */
32         unsigned long   isr;              /* Interrupt Status Reg.          */
33         unsigned long   icsr;             /* CURRENT SETUP OF EV5 IBOX      */
34         unsigned long   ic_perr_stat;     /* I-CACHE Reg. <11> set Data parity
35                                                          <12> set TAG parity*/
36         unsigned long   dc_perr_stat;     /* D-CACHE error Reg. Bits set to 1:
37                                                      <2> Data error in bank 0
38                                                      <3> Data error in bank 1
39                                                      <4> Tag error in bank 0
40                                                      <5> Tag error in bank 1 */
41         unsigned long   va;               /* Effective VA of fault or miss. */
42         unsigned long   mm_stat;          /* Holds the reason for D-stream
43                                              fault or D-cache parity errors */
44         unsigned long   sc_addr;          /* Address that was being accessed
45                                              when EV5 detected Secondary cache
46                                              failure.                 */
47         unsigned long   sc_stat;          /* Helps determine if the error was
48                                              TAG/Data parity(Secondary Cache)*/
49         unsigned long   bc_tag_addr;      /* Contents of EV5 BC_TAG_ADDR    */
50         unsigned long   ei_addr;          /* Physical address of any transfer
51                                              that is logged in EV5 EI_STAT */
52         unsigned long   fill_syndrome;    /* For correcting ECC errors.     */
53         unsigned long   ei_stat;          /* Helps identify reason of any
54                                              processor uncorrectable error
55                                              at its external interface.     */
56         unsigned long   ld_lock;          /* Contents of EV5 LD_LOCK register*/
57 };
58 
59 struct el_common_EV6_mcheck {
60 	unsigned int FrameSize;		/* Bytes, including this field */
61 	unsigned int FrameFlags;	/* <31> = Retry, <30> = Second Error */
62 	unsigned int CpuOffset;		/* Offset to CPU-specific info */
63 	unsigned int SystemOffset;	/* Offset to system-specific info */
64 	unsigned int MCHK_Code;
65 	unsigned int MCHK_Frame_Rev;
66 	unsigned long I_STAT;		/* EV6 Internal Processor Registers */
67 	unsigned long DC_STAT;		/* (See the 21264 Spec) */
68 	unsigned long C_ADDR;
69 	unsigned long DC1_SYNDROME;
70 	unsigned long DC0_SYNDROME;
71 	unsigned long C_STAT;
72 	unsigned long C_STS;
73 	unsigned long MM_STAT;
74 	unsigned long EXC_ADDR;
75 	unsigned long IER_CM;
76 	unsigned long ISUM;
77 	unsigned long RESERVED0;
78 	unsigned long PAL_BASE;
79 	unsigned long I_CTL;
80 	unsigned long PCTX;
81 };
82 
83 
84 #endif /* __ALPHA_MCE_H */
85