1// SPDX-License-Identifier: GPL-2.0+
2/dts-v1/;
3#include "aspeed-g5.dtsi"
4#include <dt-bindings/gpio/aspeed-gpio.h>
5
6/ {
7	model = "Ampere Mt. Jade BMC";
8	compatible = "ampere,mtjade-bmc", "aspeed,ast2500";
9
10	chosen {
11		stdout-path = &uart5;
12		bootargs = "console=ttyS4,115200 earlycon";
13	};
14
15	memory@80000000 {
16		reg = <0x80000000 0x20000000>;
17	};
18
19	reserved-memory {
20		#address-cells = <1>;
21		#size-cells = <1>;
22		ranges;
23
24		vga_memory: framebuffer@9f000000 {
25			no-map;
26			reg = <0x9f000000 0x01000000>; /* 16M */
27		};
28
29		gfx_memory: framebuffer {
30			size = <0x01000000>;
31			alignment = <0x01000000>;
32			compatible = "shared-dma-pool";
33			reusable;
34		};
35
36		video_engine_memory: jpegbuffer {
37			size = <0x02000000>;	/* 32M */
38			alignment = <0x01000000>;
39			compatible = "shared-dma-pool";
40			reusable;
41		};
42	};
43
44	leds {
45		compatible = "gpio-leds";
46
47		fault {
48			gpios = <&gpio ASPEED_GPIO(B, 6) GPIO_ACTIVE_HIGH>;
49		};
50
51		identify {
52			gpios = <&gpio ASPEED_GPIO(Q, 6) GPIO_ACTIVE_HIGH>;
53		};
54	};
55
56	gpio-keys {
57		compatible = "gpio-keys";
58
59		shutdown_ack {
60			label = "SHUTDOWN_ACK";
61			gpios = <&gpio ASPEED_GPIO(G, 2) GPIO_ACTIVE_LOW>;
62			linux,code = <ASPEED_GPIO(G, 2)>;
63		};
64
65		reboot_ack {
66			label = "REBOOT_ACK";
67			gpios = <&gpio ASPEED_GPIO(J, 3) GPIO_ACTIVE_LOW>;
68			linux,code = <ASPEED_GPIO(J, 3)>;
69		};
70
71		S0_overtemp {
72			label = "S0_OVERTEMP";
73			gpios = <&gpio ASPEED_GPIO(G, 3) GPIO_ACTIVE_LOW>;
74			linux,code = <ASPEED_GPIO(G, 3)>;
75		};
76
77		S0_hightemp {
78			label = "S0_HIGHTEMP";
79			gpios = <&gpio ASPEED_GPIO(J, 0) GPIO_ACTIVE_LOW>;
80			linux,code = <ASPEED_GPIO(J, 0)>;
81		};
82
83		S0_cpu_fault {
84			label = "S0_CPU_FAULT";
85			gpios = <&gpio ASPEED_GPIO(J, 1) GPIO_ACTIVE_HIGH>;
86			linux,code = <ASPEED_GPIO(J, 1)>;
87		};
88
89		S0_scp_auth_fail {
90			label = "S0_SCP_AUTH_FAIL";
91			gpios = <&gpio ASPEED_GPIO(J, 2) GPIO_ACTIVE_LOW>;
92			linux,code = <ASPEED_GPIO(J, 2)>;
93		};
94
95		S1_scp_auth_fail {
96			label = "S1_SCP_AUTH_FAIL";
97			gpios = <&gpio ASPEED_GPIO(Z, 5) GPIO_ACTIVE_LOW>;
98			linux,code = <ASPEED_GPIO(Z, 5)>;
99		};
100
101		S1_overtemp {
102			label = "S1_OVERTEMP";
103			gpios = <&gpio ASPEED_GPIO(Z, 6) GPIO_ACTIVE_LOW>;
104			linux,code = <ASPEED_GPIO(Z, 6)>;
105		};
106
107		S1_hightemp {
108			label = "S1_HIGHTEMP";
109			gpios = <&gpio ASPEED_GPIO(AB, 0) GPIO_ACTIVE_LOW>;
110			linux,code = <ASPEED_GPIO(AB, 0)>;
111		};
112
113		S1_cpu_fault {
114			label = "S1_CPU_FAULT";
115			gpios = <&gpio ASPEED_GPIO(Z, 1) GPIO_ACTIVE_HIGH>;
116			linux,code = <ASPEED_GPIO(Z, 1)>;
117		};
118
119		id_button {
120			label = "ID_BUTTON";
121			gpios = <&gpio ASPEED_GPIO(Q, 5) GPIO_ACTIVE_LOW>;
122			linux,code = <ASPEED_GPIO(Q, 5)>;
123		};
124
125		psu1_vin_good {
126			label = "PSU1_VIN_GOOD";
127			gpios = <&gpio ASPEED_GPIO(H, 4) GPIO_ACTIVE_LOW>;
128			linux,code = <ASPEED_GPIO(H, 4)>;
129		};
130
131		psu2_vin_good {
132			label = "PSU2_VIN_GOOD";
133			gpios = <&gpio ASPEED_GPIO(H, 5) GPIO_ACTIVE_LOW>;
134			linux,code = <ASPEED_GPIO(H, 5)>;
135		};
136
137		psu1_present {
138			label = "PSU1_PRESENT";
139			gpios = <&gpio ASPEED_GPIO(I, 0) GPIO_ACTIVE_LOW>;
140			linux,code = <ASPEED_GPIO(I, 0)>;
141		};
142
143		psu2_present {
144			label = "PSU2_PRESENT";
145			gpios = <&gpio ASPEED_GPIO(I, 1) GPIO_ACTIVE_LOW>;
146			linux,code = <ASPEED_GPIO(I, 1)>;
147		};
148
149	};
150
151	gpioA0mux: mux-controller {
152		compatible = "gpio-mux";
153		#mux-control-cells = <0>;
154		mux-gpios = <&gpio ASPEED_GPIO(A, 0) GPIO_ACTIVE_LOW>;
155	};
156
157	adc0mux: adc0mux {
158		compatible = "io-channel-mux";
159		io-channels = <&adc 0>;
160		#io-channel-cells = <1>;
161		io-channel-names = "parent";
162		mux-controls = <&gpioA0mux>;
163		channels = "s0", "s1";
164	};
165
166	adc1mux: adc1mux {
167		compatible = "io-channel-mux";
168		io-channels = <&adc 1>;
169		#io-channel-cells = <1>;
170		io-channel-names = "parent";
171		mux-controls = <&gpioA0mux>;
172		channels = "s0", "s1";
173	};
174
175	adc2mux: adc2mux {
176		compatible = "io-channel-mux";
177		io-channels = <&adc 2>;
178		#io-channel-cells = <1>;
179		io-channel-names = "parent";
180		mux-controls = <&gpioA0mux>;
181		channels = "s0", "s1";
182	};
183
184	adc3mux: adc3mux {
185		compatible = "io-channel-mux";
186		io-channels = <&adc 3>;
187		#io-channel-cells = <1>;
188		io-channel-names = "parent";
189		mux-controls = <&gpioA0mux>;
190		channels = "s0", "s1";
191	};
192
193	adc4mux: adc4mux {
194		compatible = "io-channel-mux";
195		io-channels = <&adc 4>;
196		#io-channel-cells = <1>;
197		io-channel-names = "parent";
198		mux-controls = <&gpioA0mux>;
199		channels = "s0", "s1";
200	};
201
202	adc5mux: adc5mux {
203		compatible = "io-channel-mux";
204		io-channels = <&adc 5>;
205		#io-channel-cells = <1>;
206		io-channel-names = "parent";
207		mux-controls = <&gpioA0mux>;
208		channels = "s0", "s1";
209	};
210
211	adc6mux: adc6mux {
212		compatible = "io-channel-mux";
213		io-channels = <&adc 6>;
214		#io-channel-cells = <1>;
215		io-channel-names = "parent";
216		mux-controls = <&gpioA0mux>;
217		channels = "s0", "s1";
218	};
219
220	adc7mux: adc7mux {
221		compatible = "io-channel-mux";
222		io-channels = <&adc 7>;
223		#io-channel-cells = <1>;
224		io-channel-names = "parent";
225		mux-controls = <&gpioA0mux>;
226		channels = "s0", "s1";
227	};
228
229	adc8mux: adc8mux {
230		compatible = "io-channel-mux";
231		io-channels = <&adc 8>;
232		#io-channel-cells = <1>;
233		io-channel-names = "parent";
234		mux-controls = <&gpioA0mux>;
235		channels = "s0", "s1";
236	};
237
238	adc9mux: adc9mux {
239		compatible = "io-channel-mux";
240		io-channels = <&adc 9>;
241		#io-channel-cells = <1>;
242		io-channel-names = "parent";
243		mux-controls = <&gpioA0mux>;
244		channels = "s0", "s1";
245	};
246
247	adc10mux: adc10mux {
248		compatible = "io-channel-mux";
249		io-channels = <&adc 10>;
250		#io-channel-cells = <1>;
251		io-channel-names = "parent";
252		mux-controls = <&gpioA0mux>;
253		channels = "s0", "s1";
254	};
255
256	adc11mux: adc11mux {
257		compatible = "io-channel-mux";
258		io-channels = <&adc 11>;
259		#io-channel-cells = <1>;
260		io-channel-names = "parent";
261		mux-controls = <&gpioA0mux>;
262		channels = "s0", "s1";
263	};
264
265	adc12mux: adc12mux {
266		compatible = "io-channel-mux";
267		io-channels = <&adc 12>;
268		#io-channel-cells = <1>;
269		io-channel-names = "parent";
270		mux-controls = <&gpioA0mux>;
271		channels = "s0", "s1";
272	};
273
274	adc13mux: adc13mux {
275		compatible = "io-channel-mux";
276		io-channels = <&adc 13>;
277		#io-channel-cells = <1>;
278		io-channel-names = "parent";
279		mux-controls = <&gpioA0mux>;
280		channels = "s0", "s1";
281	};
282
283	iio-hwmon {
284		compatible = "iio-hwmon";
285		io-channels = <&adc0mux 0>, <&adc0mux 1>,
286			<&adc1mux 0>, <&adc1mux 1>,
287			<&adc2mux 0>, <&adc2mux 1>,
288			<&adc3mux 0>, <&adc3mux 1>,
289			<&adc4mux 0>, <&adc4mux 1>,
290			<&adc5mux 0>, <&adc5mux 1>,
291			<&adc6mux 0>, <&adc6mux 1>,
292			<&adc7mux 0>, <&adc7mux 1>,
293			<&adc8mux 0>, <&adc8mux 1>,
294			<&adc9mux 0>, <&adc9mux 1>,
295			<&adc10mux 0>, <&adc10mux 1>,
296			<&adc11mux 0>, <&adc11mux 1>,
297			<&adc12mux 0>, <&adc12mux 1>,
298			<&adc13mux 0>, <&adc13mux 1>;
299	};
300
301	iio-hwmon-adc14 {
302		compatible = "iio-hwmon";
303		io-channels = <&adc 14>;
304	};
305
306	iio-hwmon-battery {
307		compatible = "iio-hwmon";
308		io-channels = <&adc 15>;
309	};
310};
311
312&fmc {
313	status = "okay";
314	flash@0 {
315		status = "okay";
316		m25p,fast-read;
317		label = "bmc";
318		/* spi-max-frequency = <50000000>; */
319#include "openbmc-flash-layout-64.dtsi"
320	};
321};
322
323&spi1 {
324	status = "okay";
325	pinctrl-names = "default";
326	pinctrl-0 = <&pinctrl_spi1_default>;
327
328	flash@0 {
329		status = "okay";
330		m25p,fast-read;
331		label = "pnor";
332		/* spi-max-frequency = <100000000>; */
333	};
334};
335
336&uart1 {
337	status = "okay";
338	pinctrl-names = "default";
339	pinctrl-0 = <&pinctrl_txd1_default
340			 &pinctrl_rxd1_default
341			 &pinctrl_ncts1_default
342			 &pinctrl_nrts1_default>;
343};
344
345&uart2 {
346	status = "okay";
347	pinctrl-names = "default";
348	pinctrl-0 = <&pinctrl_txd2_default
349			 &pinctrl_rxd2_default>;
350};
351
352&uart3 {
353	status = "okay";
354	pinctrl-names = "default";
355	pinctrl-0 = <&pinctrl_txd3_default
356			 &pinctrl_rxd3_default>;
357};
358
359&uart4 {
360	status = "okay";
361	pinctrl-names = "default";
362	pinctrl-0 = <&pinctrl_txd4_default
363			 &pinctrl_rxd4_default>;
364};
365
366/* The BMC's uart */
367&uart5 {
368	status = "okay";
369};
370
371&mac0 {
372	status = "okay";
373	pinctrl-names = "default";
374	pinctrl-0 = <&pinctrl_rmii1_default>;
375	clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
376		 <&syscon ASPEED_CLK_MAC1RCLK>;
377	clock-names = "MACCLK", "RCLK";
378	use-ncsi;
379};
380
381&mac1 {
382	status = "okay";
383	pinctrl-names = "default";
384	pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
385};
386
387&i2c0 {
388	status = "okay";
389};
390
391&i2c1 {
392	status = "okay";
393};
394
395&i2c2 {
396	status = "okay";
397};
398
399&i2c3 {
400	status = "okay";
401	eeprom@50 {
402		compatible = "microchip,24c64", "atmel,24c64";
403		reg = <0x50>;
404		pagesize = <32>;
405	};
406
407	inlet_mem2: tmp175@28 {
408		compatible = "ti,tmp175";
409		reg = <0x28>;
410	};
411
412	inlet_cpu: tmp175@29 {
413		compatible = "ti,tmp175";
414		reg = <0x29>;
415	};
416
417	inlet_mem1: tmp175@2a {
418		compatible = "ti,tmp175";
419		reg = <0x2a>;
420	};
421
422	outlet_cpu: tmp175@2b {
423		compatible = "ti,tmp175";
424		reg = <0x2b>;
425	};
426
427	outlet1: tmp175@2c {
428		compatible = "ti,tmp175";
429		reg = <0x2c>;
430	};
431
432	outlet2: tmp175@2d {
433		compatible = "ti,tmp175";
434		reg = <0x2d>;
435	};
436};
437
438&i2c4 {
439	status = "okay";
440	rtc@51 {
441		compatible = "nxp,pcf85063a";
442		reg = <0x51>;
443	};
444};
445
446&i2c5 {
447	status = "okay";
448};
449
450&i2c6 {
451	status = "okay";
452	psu@58 {
453		compatible = "pmbus";
454		reg = <0x58>;
455	};
456
457	psu@59 {
458		compatible = "pmbus";
459		reg = <0x59>;
460	};
461};
462
463&i2c7 {
464	status = "okay";
465};
466
467&i2c8 {
468	status = "okay";
469};
470
471&i2c9 {
472	status = "okay";
473};
474
475&i2c10 {
476	status = "okay";
477	adm1278@10 {
478		compatible = "adi,adm1278";
479		reg = <0x10>;
480	};
481
482	adm1278@11 {
483		compatible = "adi,adm1278";
484		reg = <0x11>;
485	};
486};
487
488&gfx {
489	status = "okay";
490	memory-region = <&gfx_memory>;
491};
492
493&pinctrl {
494	aspeed,external-nodes = <&gfx &lhc>;
495};
496
497&pwm_tacho {
498	status = "okay";
499	pinctrl-names = "default";
500	pinctrl-0 = <&pinctrl_pwm2_default &pinctrl_pwm3_default
501			&pinctrl_pwm4_default &pinctrl_pwm5_default
502			&pinctrl_pwm6_default &pinctrl_pwm7_default>;
503
504	fan@0 {
505		reg = <0x02>;
506		aspeed,fan-tach-ch = /bits/ 8 <0x04>;
507	};
508
509	fan@1 {
510		reg = <0x02>;
511		aspeed,fan-tach-ch = /bits/ 8 <0x05>;
512	};
513
514	fan@2 {
515		reg = <0x03>;
516		aspeed,fan-tach-ch = /bits/ 8 <0x06>;
517	};
518
519	fan@3 {
520		reg = <0x03>;
521		aspeed,fan-tach-ch = /bits/ 8 <0x07>;
522	};
523
524	fan@4 {
525		reg = <0x04>;
526		aspeed,fan-tach-ch = /bits/ 8 <0x08>;
527	};
528
529	fan@5 {
530		reg = <0x04>;
531		aspeed,fan-tach-ch = /bits/ 8 <0x09>;
532	};
533
534	fan@6 {
535		reg = <0x05>;
536		aspeed,fan-tach-ch = /bits/ 8 <0x0a>;
537	};
538
539	fan@7 {
540		reg = <0x05>;
541		aspeed,fan-tach-ch = /bits/ 8 <0x0b>;
542	};
543
544	fan@8 {
545		reg = <0x06>;
546		aspeed,fan-tach-ch = /bits/ 8 <0x0c>;
547	};
548
549	fan@9 {
550		reg = <0x06>;
551		aspeed,fan-tach-ch = /bits/ 8 <0x0d>;
552	};
553
554	fan@10 {
555		reg = <0x07>;
556		aspeed,fan-tach-ch = /bits/ 8 <0x0e>;
557	};
558
559	fan@11 {
560		reg = <0x07>;
561		aspeed,fan-tach-ch = /bits/ 8 <0x0f>;
562	};
563
564};
565
566&vhub {
567	status = "okay";
568};
569
570&adc {
571	status = "okay";
572};
573
574&video {
575	status = "okay";
576	memory-region = <&video_engine_memory>;
577};
578
579&gpio {
580	gpio-line-names =
581	/*A0-A7*/	"","","","S0_BMC_SPECIAL_BOOT","","","","",
582	/*B0-B7*/	"BMC_SELECT_EEPROM","","","",
583			"POWER_BUTTON","","","",
584	/*C0-C7*/	"","","","","","","","",
585	/*D0-D7*/	"","","","","","","","",
586	/*E0-E7*/	"","","","","","","","",
587	/*F0-F7*/	"","","BMC_SYS_PSON_L","S0_DDR_SAVE","PGOOD",
588			"S1_DDR_SAVE","","",
589	/*G0-G7*/	"S0_FW_BOOT_OK","SHD_REQ_L","","S0_OVERTEMP_L","","",
590			"","",
591	/*H0-H7*/	"","","","","PSU1_VIN_GOOD","PSU2_VIN_GOOD","","",
592	/*I0-I7*/	"PSU1_PRESENT","PSU2_PRESENT","S1_BMC_SPECIAL_BOOT",
593			"","","","","",
594	/*J0-J7*/	"S0_HIGHTEMP_L","S0_FAULT_L","S0_SCP_AUTH_FAIL_L","",
595			"","","","",
596	/*K0-K7*/	"","","","","","","","",
597	/*L0-L7*/       "","","","BMC_SYSRESET_L","SPI_AUTH_FAIL_L","","","",
598	/*M0-M7*/	"","","","","","","","",
599	/*N0-N7*/	"","","","","","","","",
600	/*O0-O7*/	"","","","","","","","",
601	/*P0-P7*/	"","","","","","","","",
602	/*Q0-Q7*/	"","","","","","UID_BUTTON","","",
603	/*R0-R7*/	"","","BMC_EXT_HIGHTEMP_L","OCP_AUX_PWREN",
604			"OCP_MAIN_PWREN","RESET_BUTTON","","",
605	/*S0-S7*/	"","","","","RTC_BAT_SEN_EN","","","",
606	/*T0-T7*/	"","","","","","","","",
607	/*U0-U7*/	"","","","","","","","",
608	/*V0-V7*/	"","","","","","","","",
609	/*W0-W7*/	"","","","","","","","",
610	/*X0-X7*/	"","","","","","","","",
611	/*Y0-Y7*/	"","","","","","","","",
612	/*Z0-Z7*/	"S0_BMC_PLIMIT","S1_FAULT_L","S1_FW_BOOT_OK","","",
613			"S1_SCP_AUTH_FAIL_L","S1_OVERTEMP_L","",
614	/*AA0-AA7*/	"","","","","","","","",
615	/*AB0-AB7*/	"S1_HIGHTEMP_L","S1_BMC_PLIMIT","S0_BMC_DDR_ADDR",
616			"S1_BMC_DDR_ADR","","","","",
617	/*AC0-AC7*/	"SYS_PWR_GD","","","","","BMC_READY","SLAVE_PRESENT_L",
618			"BMC_OCP_PG";
619
620	i2c4_o_en {
621		gpio-hog;
622		gpios = <ASPEED_GPIO(Y, 2) GPIO_ACTIVE_HIGH>;
623		output-high;
624		line-name = "BMC_I2C4_O_EN";
625	};
626};
627