1// SPDX-License-Identifier: GPL-2.0+
2/dts-v1/;
3
4#include "aspeed-g5.dtsi"
5#include <dt-bindings/gpio/aspeed-gpio.h>
6
7/ {
8	model = "Tyan S7106 BMC";
9	compatible = "tyan,s7106-bmc", "aspeed,ast2500";
10
11	chosen {
12		stdout-path = &uart5;
13		bootargs = "console=ttyS4,115200 earlycon";
14	};
15
16	memory@80000000 {
17		device_type = "memory";
18		reg = <0x80000000 0x20000000>;
19	};
20
21	reserved-memory {
22		#address-cells = <1>;
23		#size-cells = <1>;
24		ranges;
25
26		p2a_memory: region@987f0000 {
27			no-map;
28			reg = <0x987f0000 0x00010000>; /* 64KB */
29		};
30
31		vga_memory: framebuffer@9f000000 {
32			no-map;
33			reg = <0x9f000000 0x01000000>; /* 16M */
34		};
35
36		gfx_memory: framebuffer {
37			size = <0x01000000>; /* 16M */
38			alignment = <0x01000000>;
39			compatible = "shared-dma-pool";
40			reusable;
41		};
42	};
43
44	leds {
45		compatible = "gpio-leds";
46
47		identify {
48			gpios = <&gpio ASPEED_GPIO(A, 2) GPIO_ACTIVE_LOW>;
49		};
50
51		heartbeat {
52			gpios = <&gpio ASPEED_GPIO(E, 7) GPIO_ACTIVE_LOW>;
53		};
54	};
55
56	iio-hwmon {
57		compatible = "iio-hwmon";
58		io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
59			<&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>,
60			<&adc 8>, <&adc 9>, <&adc 10>, <&adc 11>,
61			<&adc 12>, <&adc 13>, <&adc 14>;
62	};
63
64	iio-hwmon-battery {
65		compatible = "iio-hwmon";
66		io-channels = <&adc 15>;
67	};
68};
69
70&fmc {
71	status = "okay";
72	flash@0 {
73		label = "bmc";
74		status = "okay";
75		m25p,fast-read;
76#include "openbmc-flash-layout.dtsi"
77	};
78};
79
80&spi1 {
81	status = "okay";
82	pinctrl-names = "default";
83	pinctrl-0 = <&pinctrl_spi1_default>;
84
85	flash@0 {
86		status = "okay";
87		label = "pnor";
88		m25p,fast-read;
89	};
90};
91
92&uart1 {
93	/* Rear RS-232 connector */
94	status = "okay";
95	pinctrl-names = "default";
96	pinctrl-0 = <&pinctrl_txd1_default
97			&pinctrl_rxd1_default>;
98};
99
100&uart2 {
101	/* RS-232 connector on header */
102	status = "okay";
103	pinctrl-names = "default";
104	pinctrl-0 = <&pinctrl_txd2_default
105			&pinctrl_rxd2_default>;
106};
107
108&uart3 {
109	/* Alternative to vuart to internally connect (route) to uart1
110	 * when vuart cannot be used due to BIOS limitations.
111	 */
112	status = "okay";
113};
114
115&uart4 {
116	/* Alternative to vuart to internally connect (route) to the
117	 * external port usually used by uart1 when vuart cannot be
118	 * used due to BIOS limitations.
119	 */
120	status = "okay";
121};
122
123&uart5 {
124	/* BMC "debug" (console) UART; connected to RS-232 connector
125	 * on header; selectable via jumpers as alternative to uart2
126	 */
127	status = "okay";
128};
129
130&vuart {
131	status = "okay";
132};
133
134&lpc_ctrl {
135	status = "okay";
136};
137
138&p2a {
139	status = "okay";
140	memory-region = <&p2a_memory>;
141};
142
143&lpc_snoop {
144	status = "okay";
145	snoop-ports = <0x80>;
146};
147
148&adc {
149	status = "okay";
150};
151
152&vhub {
153	status = "okay";
154};
155
156&pwm_tacho {
157	status = "okay";
158	pinctrl-names = "default";
159	pinctrl-0 = <&pinctrl_pwm0_default
160			&pinctrl_pwm1_default
161			&pinctrl_pwm3_default
162			&pinctrl_pwm4_default>;
163
164	/* CPU fan #0 */
165	fan@0 {
166		reg = <0x00>;
167		aspeed,fan-tach-ch = /bits/ 8 <0x00>;
168	};
169
170	/* CPU fan #1 */
171	fan@1 {
172		reg = <0x01>;
173		aspeed,fan-tach-ch = /bits/ 8 <0x01>;
174	};
175
176	/* PWM group for chassis fans #1, #2, #3 and #4  */
177	fan@2 {
178		reg = <0x03>;
179		aspeed,fan-tach-ch = /bits/ 8 <0x02>;
180	};
181
182	fan@3 {
183		reg = <0x03>;
184		aspeed,fan-tach-ch = /bits/ 8 <0x03>;
185	};
186
187	fan@4 {
188		reg = <0x03>;
189		aspeed,fan-tach-ch = /bits/ 8 <0x04>;
190	};
191
192	fan@5 {
193		reg = <0x03>;
194		aspeed,fan-tach-ch = /bits/ 8 <0x05>;
195	};
196
197	/* PWM group for chassis fans #5 and #6  */
198	fan@6 {
199		reg = <0x04>;
200		aspeed,fan-tach-ch = /bits/ 8 <0x06>;
201	};
202
203	fan@7 {
204		reg = <0x04>;
205		aspeed,fan-tach-ch = /bits/ 8 <0x07>;
206	};
207};
208
209&i2c0 {
210	status = "okay";
211
212	/* Hardware monitor with temperature sensors */
213	nct7802@28 {
214		compatible = "nuvoton,nct7802";
215		reg = <0x28>;
216	};
217
218	/* Also connected to:
219	 * - IPMB pin header
220	 * - CPU #0 memory error LED @ 0x3A
221	 * - CPU #1 memory error LED @ 0x3C
222	 */
223};
224
225&i2c1 {
226	/* Directly connected to PCH SMBUS #0 */
227	status = "okay";
228};
229
230&i2c2 {
231	status = "okay";
232
233	/* BMC EEPROM, incl. mainboard FRU */
234	eeprom@50 {
235		compatible = "atmel,24c256";
236		reg = <0x50>;
237	};
238
239	/* Also connected to:
240	 * - fan header
241	 * - mini-SAS HD connector
242	 * - SSATA SGPIO
243	 * - via switch (BMC_SMB3_PCH_IE_SML3_EN, active low)
244	 *   to PCH SMBUS #3
245	 */
246};
247
248&i2c3 {
249	status = "okay";
250
251	/* PSU1 FRU @ 0xA0 */
252	eeprom@50 {
253		compatible = "atmel,24c02";
254		reg = <0x50>;
255	};
256
257	/* PSU2 FRU @ 0xA2 */
258	eeprom@51 {
259		compatible = "atmel,24c02";
260		reg = <0x51>;
261	};
262
263	/* PSU1 @ 0xB0 */
264	power-supply@58 {
265		compatible = "pmbus";
266		reg = <0x58>;
267	};
268
269	/* PSU2 @ 0xB2 */
270	power-supply@59 {
271		compatible = "pmbus";
272		reg = <0x59>;
273	};
274
275	/* Also connected to:
276	 * - PCH SMBUS #1
277	 */
278};
279
280&i2c4 {
281	status = "okay";
282
283	/* Connected to:
284	 * - PCH SMBUS #2
285	 */
286
287	/* Connected via switch to:
288	 * - CPU #0 channels ABC VDDQ @ 0x80
289	 * - CPU #0 channels DEF VDDQ @ 0x81
290	 * - CPU #1 channels ABC VDDQ @ 0x82
291	 * - CPU #1 channels DEF VDDQ @ 0x83
292	 * - CPU #0 VCCIO & VMCP @ 0x52
293	 * - CPU #1 VCCIO & VMCP @ 0x53
294	 * - CPU #0 VCCIN @ 0xC0
295	 * - CPU #0 VSA @ 0xC2
296	 * - CPU #1 VCCIN @ 0xC4
297	 * - CPU #1 VSA @ 0xC6
298	 * - J110
299	 */
300};
301
302&i2c5 {
303	status = "okay";
304
305	/* Connected via switch (PCH_BMC_SMB_SW_P) to:
306	 * - mainboard FRU @ 0xAE
307	 * - XDP connector
308	 * - ME debug header
309	 * - clock buffer @ 0xD8
310	 * - i2c4 via switch (PCH_VR_SMBUS_SW_P; controlled by PCH)
311	 * - PCH SMBUS
312	 */
313};
314
315&i2c6 {
316	status = "okay";
317
318	/* Connected via switch (BMC_PE_SMB_EN_1_N) to
319	 * bus mux (selector BMC_PE_SMB_SW_BIT[1..0]) to:
320	 * - 0,0: PCIE slot 1, SMB #1
321	 * - 0,1: PCIE slot 1, SMB #2
322	 * - 1,0: PCIE slot 2, SMB #1
323	 * - 1,1: PCIE slot 2, SMB #2
324	 */
325
326	/* Connected via switch (BMC_PE_SMB_EN_2_N) to
327	 * bus mux (selector BMC_PE_SMB_SW_BIT[1..0]) to:
328	 * - 0,0: OCP0 (A) SMB
329	 * - 0,1: OCP0 (C) SMB
330	 * - 1,0: OCP1 (A) SMB
331	 * - 1,1: NC
332	 */
333};
334
335&i2c7 {
336	status = "okay";
337
338	/* Connected to:
339	 * - PCH SMBUS #4
340	 */
341};
342
343&i2c8 {
344	status = "okay";
345
346	/* Not connected */
347};
348
349&mac0 {
350	status = "okay";
351	use-ncsi;
352	pinctrl-names = "default";
353	pinctrl-0 = <&pinctrl_rmii1_default>;
354};
355
356&mac1 {
357	status = "okay";
358	pinctrl-names = "default";
359	pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
360};
361
362&ibt {
363	status = "okay";
364};
365
366&kcs1 {
367	status = "okay";
368	aspeed,lpc-io-reg = <0xca8>;
369};
370
371&kcs3 {
372	status = "okay";
373	aspeed,lpc-io-reg = <0xca2>;
374};
375
376/* Enable BMC VGA output to show an early (pre-BIOS) boot screen */
377&gfx {
378	status = "okay";
379	memory-region = <&gfx_memory>;
380};
381
382/* We're following the GPIO naming as defined at
383 * https://github.com/openbmc/docs/blob/master/designs/device-tree-gpio-naming.md.
384 *
385 * Notes on led-identify and id-button:
386 * - A physical button is connected to id-button which
387 *   triggers the clock on a D flip-flop. The /Q output of the
388 *   flip-flop drives its D input.
389 * - The flip-flop's Q output drives led-identify which is
390 *   connected to LEDs.
391 * - With that, every button press toggles the LED between on and off.
392 *
393 * Notes on power-, reset- and nmi- button and control:
394 * - The -button signals can be used to monitor physical buttons.
395 * - The -control signals can be used to actuate the specific
396 *   operation.
397 * - In hardware, the -button signals are connected to the -control
398 *   signals through drivers with the -control signals being
399 *   protected through diodes.
400 */
401&gpio {
402	status = "okay";
403	gpio-line-names =
404	/*A0*/		"",
405	/*A1*/		"",
406	/*A2*/		"led-identify", /* in/out: BMC_IDLED_ON_N */
407	/*A3*/		"",
408	/*A4*/		"",
409	/*A5*/		"",
410	/*A6*/		"",
411	/*A7*/		"",
412	/*B0-B7*/	"","","","","","","","",
413	/*C0*/		"",
414	/*C1*/		"",
415	/*C2*/		"",
416	/*C3*/		"",
417	/*C4*/		"id-button", /* in/out: BMC_IDBTN_IN_OUT_N */
418	/*C5*/		"post-complete", /* in: FM_BIOS_POST_CMPLT_N */
419	/*C6*/		"",
420	/*C7*/		"",
421	/*D0*/		"",
422	/*D1*/		"",
423	/*D2*/		"power-chassis-good", /* in: SYS_PWROK_BUF */
424	/*D3*/		"platform-reset", /* in: SYS_PLTRST_N */
425	/*D4*/		"",
426	/*D5*/		"",
427	/*D6*/		"",
428	/*D7*/		"",
429	/*E0*/		"power-button", /* in: BMC_PWBTN_IN_N */
430	/*E1*/		"power-chassis-control", /* out: BMC_PWRBTN_OUT_N */
431	/*E2*/		"reset-button", /* in: BMC_RSTBTN_IN_N */
432	/*E3*/		"reset-control", /* out: BMC_RSTBTN_OUT_N */
433	/*E4*/		"nmi-button", /* in: BMC_NMIBTN_IN_N */
434	/*E5*/		"nmi-control", /* out: BMC_NMIBTN_OUT_N */
435	/*E6*/		"",
436	/*E7*/		"led-heartbeat", /* out: BMC_HEARTBRAT_LED_N */
437	/*F0*/		"",
438	/*F1*/		"clear-cmos-control", /* out: BMC_CLR_CMOS_N */
439	/*F2*/		"",
440	/*F3*/		"",
441	/*F4*/		"led-fault", /* out: AST_HW_FAULT_N */
442	/*F5*/		"",
443	/*F6*/		"",
444	/*F7*/		"",
445	/*G0*/		"BMC_PE_SMB_EN_1_N", /* out */
446	/*G1*/		"BMC_PE_SMB_EN_2_N", /* out */
447	/*G2*/		"",
448	/*G3*/		"",
449	/*G4*/		"",
450	/*G5*/		"",
451	/*G6*/		"",
452	/*G7*/		"",
453	/*H0-H7*/	"","","","","","","","",
454	/*I0-I7*/	"","","","","","","","",
455	/*J0-J7*/	"","","","","","","","",
456	/*K0-K7*/	"","","","","","","","",
457	/*L0-L7*/	"","","","","","","","",
458	/*M0-M7*/	"","","","","","","","",
459	/*N0-N7*/	"","","","","","","","",
460	/*O0-O7*/	"","","","","","","","",
461	/*P0-P7*/	"","","","","","","","",
462	/*Q0*/		"",
463	/*Q1*/		"",
464	/*Q2*/		"",
465	/*Q3*/		"",
466	/*Q4*/		"BMC_PE_SMB_SW_BIT0", /* out */
467	/*Q5*/		"BMC_PE_SMB_SW_BIT1", /* out */
468	/*Q6*/		"",
469	/*Q7*/		"",
470	/*R0-R7*/	"","","","","","","","",
471	/*S0-S7*/	"","","","","","","","",
472	/*T0-T7*/	"","","","","","","","",
473	/*U0-U7*/	"","","","","","","","",
474	/*V0-V7*/	"","","","","","","","",
475	/*W0-W7*/	"","","","","","","","",
476	/*X0-X7*/	"","","","","","","","",
477	/*Y0-Y7*/	"","","","","","","","",
478	/*Z0-Z7*/	"","","","","","","","",
479	/*AA0*/		"",
480	/*AA1*/		"",
481	/*AA2*/		"",
482	/*AA3*/		"BMC_SMB3_PCH_IE_SML3_EN", /* out */
483	/*AA4*/		"",
484	/*AA5*/		"",
485	/*AA6*/		"",
486	/*AA7*/		"",
487	/*AB0-AB7*/	"","","","","","","","";
488};
489